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| 2011 | ||
|---|---|---|
| 31 | Supratik Chakraborty, Amit Kumar: IARCS Annual Conference on Foundations of Software Technology and Theoretical Computer Science, FSTTCS 2011, December 12-14, 2011, Mumbai, India Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik 2011 | |
| 30 | Ajith K. John, Supratik Chakraborty: A Quantifier Elimination Algorithm for Linear Modular Equations and Disequations. CAV 2011: 486-503 | |
| 29 | Supratik Chakraborty, Amit Kumar: Frontmatter, Table of Contents, Preface, Conference Organization, External Reviewers. FSTTCS 2011 | |
| 28 | Bhargav S. Gulavani, Supratik Chakraborty, G. Ramalingam, Aditya V. Nori: Bottom-up shape analysis using LISF. ACM Trans. Program. Lang. Syst. 33(5): 17 (2011) | |
| 27 | Hrishikesh Karmarkar, Supratik Chakraborty: Determinization of $\omega$-automata unified CoRR abs/1101.1841: (2011) | |
| 2010 | ||
| 26 | Jeff Edmonds, Supratik Chakraborty: Bounding Variance and Expectation of Longest Path Lengths in DAGs. SODA 2010: 766-781 | |
| 25 | Abhisekh Sankaran, Supratik Chakraborty: On Semantic Generalizations of the Bernays-Schönfinkel-Ramsey Class with Finite or Co-finite Spectra CoRR abs/1002.4334: (2010) | |
| 24 | Bhargav S. Gulavani, Supratik Chakraborty, Aditya V. Nori, Sriram K. Rajamani: Refining abstract interpretations. Inf. Process. Lett. 110(16): 666-671 (2010) | |
| 2009 | ||
| 23 | Hrishikesh Karmarkar, Supratik Chakraborty: On Minimal Odd Rankings for Büchi Complementation. ATVA 2009: 228-243 | |
| 22 | Bhargav S. Gulavani, Supratik Chakraborty, Ganesan Ramalingam, Aditya V. Nori: Bottom-Up Shape Analysis. SAS 2009: 188-204 | |
| 2008 | ||
| 21 | Bhargav S. Gulavani, Supratik Chakraborty, Aditya V. Nori, Sriram K. Rajamani: Automatically Refining Abstract Interpretations. TACAS 2008: 443-458 | |
| 20 | Dina Thomas, Supratik Chakraborty, Paritosh K. Pandya: Efficient guided symbolic reachability using reachability expressions. STTT 10(2): 113-129 (2008) | |
| 2007 | ||
| 19 | Sasidhar Sunkari, Supratik Chakraborty, Vivekananda M. Vedula, Kailasnath Maneparambil: A Scalable Symbolic Simulator for Verilog RTL. MTV 2007: 51-59 | |
| 2006 | ||
| 18 | Joycee Mekie, Supratik Chakraborty, Dinesh K. Sharma, Girish Venkataramani, P. S. Thiagarajan: Interface Design for Rationally Clocked GALS Systems. ASYNC 2006: 160-171 | |
| 17 | Dina Thomas, Supratik Chakraborty, Paritosh K. Pandya: Efficient Guided Symbolic Reachability Using Reachability Expressions. TACAS 2006: 120-134 | |
| 16 | Supratik Chakraborty, Joycee Mekie, Dinesh K. Sharma: Reasoning about synchronization in GALS systems. Formal Methods in System Design 28(2): 153-169 (2006) | |
| 2005 | ||
| 15 | Babita Sharma, Paritosh K. Pandya, Supratik Chakraborty: Bounded Validity Checking of Interval Duration Logic. TACAS 2005: 301-316 | |
| 2004 | ||
| 14 | Joycee Mekie, Supratik Chakraborty, Dinesh K. Sharma: Evaluation of pausible clocking for interfacing high speed IP cores in GALS Framework. VLSI Design 2004: 559-564 | |
| 2002 | ||
| 13 | Rohan Angrish, Supratik Chakraborty: Probabilistic Timing Analysis of Asynchronous Systems with Moments of Delay. ASYNC 2002: 99-108 | |
| 12 | Subir K. Roy, S. Ramesh, Supratik Chakraborty, Tsuneo Nakata, Sreeranga P. Rajan: Functional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract). VLSI Design 2002: 11-13 | |
| 11 | Supratik Chakraborty, Rajeev Murgai: Layout-Driven Timing Optimization by Generalized De Morgan Transform. VLSI Design 2002: 647-654 | |
| 2001 | ||
| 10 | Supratik Chakraborty, Rajeev Murgai: Complexity Of Minimum-Delay Gate Resizing. VLSI Design 2001: 425-430 | |
| 2000 | ||
| 9 | Kenneth Y. Yun, Kevin W. James, R. H. Fairlie-Cuninghame, Supratik Chakraborty, Rene L. Cruz: A self-timed real-time sorting network. IEEE Trans. VLSI Syst. 8(3): 356-363 (2000) | |
| 1999 | ||
| 8 | Supratik Chakraborty, Kenneth Y. Yun, David L. Dill: Timing analysis of asynchronous systems using time separation of events. IEEE Trans. on CAD of Integrated Circuits and Systems 18(8): 1061-1076 (1999) | |
| 1997 | ||
| 7 | Supratik Chakraborty, David L. Dill, Kun-Yung Chang, Kenneth Y. Yun: Timing Analysis of Extended Burst-Mode Circuits. ASYNC 1997: 101-111 | |
| 6 | Supratik Chakraborty, David L. Dill: More Accurate Polynomial-Time Min-Max Timing Simulation. ASYNC 1997: 112- | |
| 5 | Supratik Chakraborty, David L. Dill: Approximate algorithms for time separation of events. ICCAD 1997: 190-194 | |
| 1996 | ||
| 4 | Supratik Chakraborty, Dipanwita Roy Chowdhury, Parimal Pal Chaudhuri: Theory and Application of Nongroup Cellular Automata for Synthesis of Easily Testable Finite State Machines. IEEE Trans. Computers 45(7): 769-781 (1996) | |
| 1993 | ||
| 3 | Dipanwita Roy Chowdhury, Supratik Chakraborty, B. Vamsi, B. Pal Chaudhuri: Cellular automata based synthesis of easily and fully testable FSMs. ICCAD 1993: 650-653 | |
| 2 | Dipanwita Roy Chowdhury, Supratik Chakraborty, Parimal Pal Chaudhuri: Synthesis of Self-Checking Sequential Machines Using Cellular Automata. VLSI Design 1993: 107 | |
| 1 | S. Nandi, Vamsi Boppana, Supratik Chakraborty, Parimal Pal Chaudhuri, Samir Roy: Delay Fault Test Generation with Cellular Automata. VLSI Design 1993: 281-286 | |
Colors in the list of coauthors
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