Rakesh Chadha

	1999
5		Lun Ye, Foong-Charn Chang, Peter Feldmann, Rakesh Chadha, Nagaraj Ns, Frank Cano: Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs. DATE 1999: 658-663
	1992
4		Tom Chanak, Rakesh Chadha, Kishore Singhal: Switched-capacitor simulation models for full-chips verification. IEEE Trans. on CAD of Integrated Circuits and Systems 11(11): 1363-1371 (1992)
3		Rakesh Chadha, Chandramouli Visweswariah, Chin-Fu Chen: M3-a multilevel mixed-mode mixed A/D simulator. IEEE Trans. on CAD of Integrated Circuits and Systems 11(5): 575-585 (1992)
	1988
2		Chandramouli Visweswariah, Rakesh Chadha, Chin-Fu Chen: Model Development and Verification for High Level Analog Blocks. DAC 1988: 376-382
	1987
1		Rakesh Chadha, Kishore Singhal, Jiri Vlach, Ernst Christen, Milan Vlach: WATOPT -- An Optimizer for Circuit Applications. IEEE Trans. on CAD of Integrated Circuits and Systems 6(3): 472-479 (1987)

Coauthor Index

1	Frank Cano	[5]
2	Tom Chanak	[4]
3	Foong-Charn Chang	[5]
4	Chin-Fu Chen	[2] [3]
5	Ernst Christen	[1]
6	Peter Feldmann	[5]
7	Nagaraj Ns	[5]
8	Kishore Singhal	[1] [4]
9	Chandramouli Visweswariah	[2] [3]
10	Jiri Vlach	[1]
11	Milan Vlach	[1]
12	Lun Ye	[5]

Colors in the list of coauthors

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