Peter Celinski

	2004
6		Peter Celinski, Said F. Al-Sarawi, Derek Abbott, Sorin Cotofana, Stamatis Vassiliadis: Logical Effort Based Design Exploration of 64-bit Adders Using a Mixed Dynamic-CMOS/Threshold-Logic Approach. ISVLSI 2004: 127-134
5		Troy D. Townsend, Peter Celinski, Said F. Al-Sarawi, Michael J. Liebelt: Hybrid Parallel Counters - Domino and Threshold Logic. ISVLSI 2004: 275-276
4		Peter Celinski, Derek Abbott, Sorin Cotofana: Delay Evaluation of High Speed Data-Path Circuits Based on Threshold Logic. PATMOS 2004: 899-906
	2003
3		Peter Celinski, Derek Abbott, Sorin Dan Cotofana: Area efficient, high speed parallel counter circuits using charge recycling threshold logic. ISCAS (5) 2003: 233-236
2		Peter Celinski, Sorin Cotofana, Derek Abbott: A-DELTA: A 64-bit High Speed, Compact, Hybrid Dynamic-CMOS/Threshold-Logic Adder. IWANN (2) 2003: 73-80
	2002
1		Peter Celinski, Said F. Al-Sarawi, Derek Abbott, José Francisco López: Low depth carry lookahead addition using charge recycling threshold logic. ISCAS (1) 2002: 469-472

Coauthor Index

1	Derek Abbott	[1] [2] [3] [4] [6]
2	Said F. Al-Sarawi	[1] [5] [6]
3	Sorin Cotofana (Sorin Dan Cotofana)	[2] [3] [4] [6]
4	Michael J. Liebelt	[5]
5	José Francisco López	[1]
6	Troy D. Townsend	[5]
7	Stamatis Vassiliadis	[6]

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