Ralph K. Cavin III

	2012
24		Ralph K. Cavin III, Paolo Lugli, Victor V. Zhirnov: Prolog to the Section on Science and Engineering Beyond Moore's Law. Proceedings of the IEEE 100(Centennial-Issue): 1718-1719 (2012)
23		Ralph K. Cavin III, Paolo Lugli, Victor V. Zhirnov: Science and Engineering Beyond Moore's Law. Proceedings of the IEEE 100(Centennial-Issue): 1720-1749 (2012)
	2008
22		Victor V. Zhirnov, Greg Leeming, Kosmas Galatsis, Ralph K. Cavin III: The Viability of Cellular Automata Architectures for General Purpose Computing. ERSA 2008: 321-333
21		Victor V. Zhirnov, Ralph K. Cavin III, Greg Leeming, Kosmas Galatsis: An Assessment of Integrated Digital Cellular Automata Architectures. IEEE Computer 41(1): 38-44 (2008)
20		James A. Hutchby, Ralph K. Cavin III, Victor V. Zhirnov, Joe E. Brewer, George Bourianoff: Emerging Nanoscale Memory and Logic Devices: A Critical Assessment. IEEE Computer 41(5): 28-32 (2008)
19		Ralph K. Cavin III, James A. Hutchby, Victor V. Zhirnov, Joe E. Brewer, George Bourianoff: Emerging Research Architectures. IEEE Computer 41(5): 33-37 (2008)
18		George Bourianoff, Joe E. Brewer, Ralph K. Cavin III, James A. Hutchby, Victor V. Zhirnov: Boolean Logic and Alternative Information-Processing Devices. IEEE Computer 41(5): 38-46 (2008)
	2004
17		Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III, Dale Edwards: A hybrid current/voltage mode on-chip signaling scheme with adaptive bandwidth capability. IEEE Trans. VLSI Syst. 12(8): 876-880 (2004)
	2003
16		Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III: Low-power design methodology for an on-chip bus with adaptive bandwidth capability. DAC 2003: 628-633
15		Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III: Accurate delay model and experimental verification for current/voltage mode on-chip interconnects. ISCAS (5) 2003: 169-172
14		Rizwan Bashirullah, Wentai Liu, Ralph K. Cavin III: Current-mode signaling in deep submicrometer global interconnects. IEEE Trans. VLSI Syst. 11(3): 406-417 (2003)
	2000
13		Hong-Yean Hsieh, Wentai Liu, Ralph K. Cavin III: Integrated parametric timing optimization of digital systems. IEEE Trans. on CAD of Integrated Circuits and Systems 19(4): 482-489 (2000)
	1997
12		Hong-Yean Hsieh, Wentai Liu, Paul D. Franzon, Ralph K. Cavin III: Clocking Optimization and Distribution in Digital Systems with Scheduled Skews. VLSI Signal Processing 16(2-3): 131-147 (1997)
	1995
11		Gary C. Moyer, Mark Clements, Wentai Liu, Toby Schaffer, Ralph K. Cavin III: A technique for high-speed, fine-resolution pattern generation and its CMOS implementation. ARVLSI 1995: 131-149
10		Hong-Yean Hsieh, Wentai Liu, Ralph K. Cavin III, C. Thomas Gray: Concurrent timing optimization of latch-based digital systems. ICCD 1995: 680-
9		Gary C. Moyer, Mark Clements, Wentai Liu, Toby Schaffer, Ralph K. Cavin III: High Speed, Fine Resolution Pattern Generation Using the Matched Delay Technique. ISCAS 1995: 405-408
	1994
8		C. Thomas Gray, Wentai Liu, Ralph K. Cavin III: Timing constraints for wave-pipelined systems. IEEE Trans. on CAD of Integrated Circuits and Systems 13(8): 987-1004 (1994)
7		C. Thomas Gray, Wentai Liu, Ralph K. Cavin III, Hong-Yean Hsieh: Circuit delay calculation considering data dependent delays. Integration 17(1): 1-23 (1994)
	1991
6		C. Thomas Gray, Thomas A. Hughes, Sanjay Arora, Wentai Liu, Ralph K. Cavin III: Theoretical and Practical Issues in CMOS Wave Pipelining. VLSI 1991: 397-409
	1989
5		Wentai Liu, Thomas H. Hildebrandt, Ralph K. Cavin III: Hamiltonian Cycles in the Shuffle-Exchange Network. IEEE Trans. Computers 38(5): 745-750 (1989)
	1988
4		Wentai Liu, Tong-Fei Yeh, William E. Batchelor, Ralph K. Cavin III: Exploiting Bit Level Concurrency in Real-Time Geometric Feature Extractions. ISCA 1988: 167-174
	1984
3		Ralph K. Cavin III: Introduction to the SRC design sciences program. DAC 1984: 216-217
2		Robert M. Burger, Ralph K. Cavin III, William C. Holton, Larry W. Sumney: The Impact of ICs on Computer Technology. IEEE Computer 17(10): 88-95 (1984)
	1982
1		Stephen K. Jones, Ralph K. Cavin III, William M. Reed: Analysis of error-gradient adaptive linear estimators for a class of stationary dependent processes. IEEE Transactions on Information Theory 28(2): 318-329 (1982)

Coauthor Index

1	Sanjay Arora	[6]
2	Rizwan Bashirullah	[14] [15] [16] [17]
3	William E. Batchelor	[4]
4	George Bourianoff	[18] [19] [20]
5	Joe E. Brewer	[18] [19] [20]
6	Robert M. Burger	[2]
7	Mark Clements	[9] [11]
8	Dale Edwards	[17]
9	Paul D. Franzon	[12]
10	Kosmas Galatsis	[21] [22]
11	C. Thomas Gray	[6] [7] [8] [10]
12	Thomas H. Hildebrandt	[5]
13	William C. Holton	[2]
14	Hong-Yean Hsieh	[7] [10] [12] [13]
15	Thomas A. Hughes	[6]
16	James A. Hutchby	[18] [19] [20]
17	Stephen K. Jones	[1]
18	Greg Leeming	[21] [22]
19	Wentai Liu	[4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17]
20	Paolo Lugli	[23] [24]
21	Gary C. Moyer	[9] [11]
22	William M. Reed	[1]
23	Toby Schaffer	[9] [11]
24	Larry W. Sumney	[2]
25	Tong-Fei Yeh	[4]
26	Victor V. Zhirnov	[18] [19] [20] [21] [22] [23] [24]

Colors in the list of coauthors

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