 | 2009 |
| 5 |  | Liang-Chi Chen,
Paul Dickinson,
Peter Dahlgren,
Scott Davidson,
Olivier Caty,
Kevin Wu:
Using transition test to understand timing behavior of logic circuits on UltraSPARCTM T2 family.
ITC 2009: 1-10 |
| 2008 |
| 4 |  | Liang-Chi Chen,
Paul Dickinson,
Prasad Mantri,
Murali M. R. Gala,
Peter Dahlgren,
Subhra Bhattacharya,
Olivier Caty,
Kevin Woodling,
Thomas A. Ziaja,
David Curwen,
Wendy Yee,
Ellen Su,
Guixiang Gu,
Tim Nguyen:
Transition Test on UltraSPARC- T2 Microprocessor.
ITC 2008: 1-10 |
| 2005 |
| 3 |  | Olivier Caty,
Peter Dahlgren,
Ismet Bayraktaroglu:
Microprocessor silicon debug based on failure propagation tracing.
ITC 2005: 10 |
| 2 |  | Ismet Bayraktaroglu,
Olivier Caty,
Yickkei Wong:
Highly Configurable Programmable Built-In Self Test Architecture for High-Speed Memories.
VTS 2005: 21-26 |
| 2003 |
| 1 |  | Olivier Caty,
Ismet Bayraktaroglu,
Amitava Majumdar,
Richard Lee,
John Bell,
Lisa Curhan:
Instruction Based BIST for Board/System Level Test of External Memories and Internconnects.
ITC 2003: 961-970 |