Silvia Cataldo

	2000
3		Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Hans-Joachim Wunderlich: Optimal Hardware Pattern Generation for Functional BIST. DATE 2000: 292-297
2		Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian: A High-Level EDA Environment for the Automatic Insertion of HD-BIST Structures. J. Electronic Testing 16(3): 179-184 (2000)
	1999
1		Alfredo Benso, Silvia Cataldo, Silvia Chiusano, Paolo Prinetto, Yervant Zorian: HD-BIST: a hierarchical framework for BIST scheduling and diagnosis in SOCs. ITC 1999: 1038-1044

Coauthor Index

1	Alfredo Benso	[1] [2]
2	Silvia Chiusano	[1] [2] [3]
3	Paolo Prinetto	[1] [2] [3]
4	Hans-Joachim Wunderlich	[3]
5	Yervant Zorian	[1] [2]

Last update Sun May 27 04:04:01 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page