David Castells-Rufas

	2012
8		Eduard Fernandez-Alonso, David Castells-Rufas, Jaume Joven, Jordi Carrabina: Development process for clusters on a reconfigurable chip. Computers & Electrical Engineering 38(3): 756-771 (2012)
	2011
7		David Castells-Rufas, Eduard Fernandez-Alonso, Jordi Carrabina, Jaume Joven: Sharing FPUs in many-soft-cores. FPT 2011: 1-6
6		Jaume Joven, Per Strict, David Castells-Rufas, Akash Bagdia, Giovanni De Micheli, Jordi Carrabina: HW-SW implementation of a decoupled FPU for ARM-based Cortex-M1 SoCs in FPGAs. SIES 2011: 1-8
	2010
5		Eduard Fernandez-Alonso, David Castells-Rufas, Sergi Risueño, Jordi Carrabina, Jaume Joven: A NoC-based multi-{soft}core with 16 cores. ICECS 2010: 259-262
4		David Castells-Rufas, Jaume Joven, Jordi Carrabina: Scalability of a Parallel JPEG Encoder on Shared Memory Architectures. ICPP 2010: 502-507
3		David Castells-Rufas, Jaume Joven, Sergi Risueño, Eduard Fernandez-Alonso, Jordi Carrabina, Thomas William, Hartmut Mix: MPSoC Performance Analysis with Virtual Prototyping Platforms. ICPP Workshops 2010: 154-160
	2008
2		Jaume Joven, Oriol Font-Bach, David Castells-Rufas, Ricardo Martínez, Lluís Terés, Jordi Carrabina: xENoC - An eXperimental Network-On-Chip Environment for Parallel Distributed Computing on NoC-based MPSoC Architectures. PDP 2008: 141-148
	2007
1		David Castells-Rufas, Jordi Carrabina: Jumble: A Hardware-in-the-Loop Simulation System for JHDL. FCCM 2007: 345-348

Coauthor Index

1	Akash Bagdia	[6]
2	Jordi Carrabina (Jordi Carrabina Bordoll)	[1] [2] [3] [4] [5] [6] [7] [8]
3	Eduard Fernandez-Alonso	[3] [5] [7] [8]
4	Oriol Font-Bach	[2]
5	Jaume Joven	[2] [3] [4] [5] [6] [7] [8]
6	Ricardo Martínez	[2]
7	Giovanni De Micheli	[6]
8	Hartmut Mix	[3]
9	Sergi Risueño	[3] [5]
10	Per Strict	[6]
11	Lluís Terés	[2]
12	Thomas William	[3]

Last update Sun May 27 04:04:01 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page