Carlos Carreras

	2012
29		Ruzica Jevtic, Carlos Carreras: A complete dynamic power estimation model for data-paths in FPGA DSP designs. Integration 45(2): 172-185 (2012)
	2011
28		Ruzica Jevtic, Bojan Jovanovic, Carlos Carreras: Power estimation of dividers implemented in FPGAs. ACM Great Lakes Symposium on VLSI 2011: 313-318
27		Pablo Barrio, Carlos Carreras: Mesh traversal and sorting for efficient memory usage in scientific codes. IPCCC 2011: 1-8
26		Ruzica Jevtic, Carlos Carreras: Power Measurement Methodology for FPGA Devices. IEEE T. Instrumentation and Measurement 60(1): 237-247 (2011)
	2010
25		Gabriel Caffarena, Carlos Carreras, Juan A. López, Angel Fernandez Herrero: Fast fixed-point optimization of DSP algorithms. VLSI-SoC 2010: 195-200
24		Gabriel Caffarena, Carlos Carreras: Architectural synthesis of DSP circuits under simultaneous error and time constraints. VLSI-SoC 2010: 322-327
23		Gabriel Caffarena, Angel Fernandez Herrero, Juan A. López, Carlos Carreras: Fast Fixed-Point Optimization of DSP Algorithms. VLSI-SoC (Selected Papers) 2010: 182-205
22		Gabriel Caffarena, Carlos Carreras, Juan A. López, Angel Fernandez Herrero: SQNR Estimation of Fixed-Point DSP Algorithms. EURASIP J. Adv. Sig. Proc. 2010: (2010)
21		Ruzica Jevtic, Carlos Carreras: Power Estimation of Embedded Multiplier Blocks in FPGAs. IEEE Trans. VLSI Syst. 18(5): 835-839 (2010)
20		Javier Gonzalez Bayon, Carlos Carreras, Ove Edfors: A Multistandard Frequency Offset Synchronization Scheme for 802.11n, 802.16d, LTE, and DVB-T/H Systems. Journal Comp. Netw. and Communic. 2010: (2010)
	2009
19		Slobodan Bojanic, Vukasin Pejovic, Gabriel Caffarena, Vladimir Milovanovic, Carlos Carreras, Jelena Popovic: Behavioural Biometrics Hardware Based on Bioinformatics Matching. CISIS 2009: 171-178
18		Vukasin Pejovic, Slobodan Bojanic, Carlos Carreras, Atta Badii: A Practical Method for Testing High-Speed Networking Hardware Architectures. ICNS 2009: 122-130
17		Ruzica Jevtic, Carlos Carreras, Vukasin Pejovic: Floorplan-based FPGA interconnect power estimation in DSP circuits. SLIP 2009: 53-60
16		Gabriel Caffarena, Juan A. López, Gerardo Leyva, Carlos Carreras, Octavio Nieto-Taladriz: Architectural Synthesis of Fixed-Point DSP Datapaths Using FPGAs. Int. J. Reconfig. Comp. 2009: (2009)
	2008
15		Ruzica Jevtic, Carlos Carreras: Analytical High-Level Power Model for LUT-Based Components. PATMOS 2008: 369-378
14		Ruzica Jevtic, Carlos Carreras, Domenik Helms: A Comparison of Approaches for High-Level Power Estimation of LUT-Based DSP Components. ReConFig 2008: 361-366
13		Gabriel Caffarena, Juan A. López, Gerardo Leyva, Carlos Carreras, Octavio Nieto-Taladriz: Optimized Architectural Synthesis of Fixed-Point Datapaths. ReConFig 2008: 85-90
	2007
12		Ruzica Jevtic, Carlos Carreras, Gabriel Caffarena: Switching Activity Models for Power Estimation in FPGA Multipliers. ARC 2007: 201-213
11		Vukasin Pejovic, Slobodan Bojanic, Carlos Carreras: A TCP/IP Fragmentation Monitoring Core For Intrusion Prevention. ERSA 2007: 227-230
10		Vukasin Pejovic, Slobodan Bojanic, Carlos Carreras: Adding Value to TCP/IP Based Information exchange Security by Specialized Hardware. SECURWARE 2007: 145-150
9		Juan A. López, Carlos Carreras, Octavio Nieto-Taladriz: Improved Interval-Based Characterization of Fixed-Point LTI Systems With Feedback Loops. IEEE Trans. on CAD of Integrated Circuits and Systems 26(11): 1923-1933 (2007)
8		Gabriel Caffarena, Carlos E. Pedreira, Carlos Carreras, Slobodan Bojanic, Octavio Nieto-Taladriz: Fpga Acceleration for DNA Sequence Alignment. Journal of Circuits, Systems, and Computers 16(2): 245-266 (2007)
	2006
7		Gabriel Caffarena, Juan A. López, Carlos Carreras, Octavio Nieto-Taladriz: High-Level Synthesis of Multiple Word-Length DSP Algorithms Using Heterogeneous-Resource FPGAs. FPL 2006: 1-4
	2004
6		Gerardo Leyva, Gabriel Caffarena, Carlos Carreras, Octavio Nieto-Taladriz: A Generator of High-Speed Floating-Point Modules. FCCM 2004: 306-307
	2003
5		Juan A. López, Carlos Carreras, Gabriel Caffarena, Octavio Nieto-Taladriz: Fast characterization of the noise bounds derived from coefficient and signal quantization. ISCAS (4) 2003: 309-312
	2000
4		Carlos Carreras, Manuel V. Hermenegildo: Grid-Based Histogram Arithmetic for the Probabilistic Analysis of Functions. SARA 2000: 107-123
	1999
3		Carlos Carreras, Juan A. López, Octavio Nieto-Taladriz: Bit-Width Selection for Data-Path Implementations. ISSS 1999: 114-121
	1996
2		Carlos Carreras, Juan Carlos López, María Luisa López Vallejo, Luis Sánchez, Carlos Delgado Kloos, Natividad Martínez Madrid: A Co-Design Methodology Based on Formal Specification and High-level Estimation. CODES 1996: 28-35
	1994
1		Carlos Carreras, Carlos A. López, Manuel V. Hermenegildo: Analytic Model of a Cache Only Memory Architecture. PARLE 1994: 336-350

Coauthor Index

1	Atta Badii	[18]
2	Pablo Barrio	[27]
3	Javier Gonzalez Bayon	[20]
4	Slobodan Bojanic	[8] [10] [11] [18] [19]
5	Gabriel Caffarena	[5] [6] [7] [8] [12] [13] [16] [19] [22] [23] [24] [25]
6	Ove Edfors	[20]
7	Domenik Helms	[14]
8	Manuel V. Hermenegildo	[1] [4]
9	Angel Fernandez Herrero	[22] [23] [25]
10	Ruzica Jevtic	[12] [14] [15] [17] [21] [26] [28] [29]
11	Bojan Jovanovic	[28]
12	Carlos Delgado Kloos	[2]
13	Gerardo Leyva	[6] [13] [16]
14	Carlos A. López	[1]
15	Juan A. López	[3] [5] [7] [9] [13] [16] [22] [23] [25]
16	Juan Carlos López	[2]
17	Natividad Martínez Madrid	[2]
18	Vladimir Milovanovic	[19]
19	Octavio Nieto-Taladriz	[3] [5] [6] [7] [8] [9] [13] [16]
20	Carlos E. Pedreira	[8]
21	Vukasin Pejovic	[10] [11] [17] [18] [19]
22	Jelena Popovic	[19]
23	Luis Sánchez	[2]
24	María Luisa López Vallejo	[2]

Colors in the list of coauthors

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