 | 2012 |
| 18 |  | Davide De Caro,
Marino Coppola,
Nicola Petra:
A high-speed differential resistor ladder.
Microelectronics Journal 43(6): 433-438 (2012) |
| 2011 |
| 17 |  | Antonio G. M. Strollo,
Davide De Caro,
Nicola Petra:
Elementary Functions Hardware Implementation Using Constrained Piecewise-Polynomial Approximations.
IEEE Trans. Computers 60(3): 418-432 (2011) |
| 16 |  | Davide De Caro,
Nicola Petra,
Antonio G. M. Strollo:
Direct Digital Frequency Synthesizer Using Nonuniform Piecewise-Linear Approximation.
IEEE Trans. on Circuits and Systems 58-I(10): 2409-2419 (2011) |
| 15 |  | Nicola Petra,
Davide De Caro,
Valeria Garofalo,
Ettore Napoli,
Antonio G. M. Strollo:
Design of Fixed-Width Multipliers With Linear Compensation Function.
IEEE Trans. on Circuits and Systems 58-I(5): 947-960 (2011) |
| 14 |  | Davide De Caro,
Nicola Petra,
Antonio G. M. Strollo:
Efficient Logarithmic Converters for Digital Signal Processing Applications.
IEEE Trans. on Circuits and Systems 58-II(10): 667-671 (2011) |
| 2010 |
| 13 |  | Davide De Caro,
Marino Coppola,
Nicola Petra,
Ettore Napoli,
Antonio G. M. Strollo,
Valeria Garofalo:
High-speed differential resistor ladder for A/D converters.
ISCAS 2010: 1723-1726 |
| 12 |  | Nicola Petra,
Davide De Caro,
Antonio G. M. Strollo,
Valeria Garofalo,
Ettore Napoli,
Marino Coppola,
Pietro Todisco:
Fixed-width CSD multipliers with minimum mean square error.
ISCAS 2010: 4149-4152 |
| 11 |  | Valeria Garofalo,
Marino Coppola,
Davide De Caro,
Ettore Napoli,
Nicola Petra,
Antonio G. M. Strollo:
A novel truncated squarer with linear compensation function.
ISCAS 2010: 4157-4160 |
| 10 |  | Nicola Petra,
Davide De Caro,
Valeria Garofalo,
Ettore Napoli,
Antonio G. M. Strollo:
Truncated Binary Multipliers With Variable Correction and Minimum Mean Square Error.
IEEE Trans. on Circuits and Systems 57-I(6): 1312-1325 (2010) |
| 9 |  | Davide De Caro,
Carlo Alberto Romani,
Nicola Petra,
Antonio G. M. Strollo,
Claudio Parrella:
A 1.27 GHz, All-Digital Spread Spectrum Clock Generator/Synthesizer in 65 nm CMOS.
J. Solid-State Circuits 45(5): 1048-1060 (2010) |
| 2009 |
| 8 |  | Davide De Caro,
Nicola Petra,
Antonio G. M. Strollo:
Digital Synthesizer/Mixer With Hybrid CORDIC-Multiplier Architecture: Error Analysis and Optimization.
IEEE Trans. on Circuits and Systems 56-I(2): 364-373 (2009) |
| 7 |  | Davide De Caro,
Nicola Petra,
Antonio G. M. Strollo:
High-Performance Special Function Unit for Programmable 3-D Graphics Processors.
IEEE Trans. on Circuits and Systems 56-I(9): 1968-1978 (2009) |
| 2008 |
| 6 |  | Davide De Caro,
Nicola Petra,
Antonio G. M. Strollo:
A high performance floating-point special function unit using constrained piecewise quadratic approximation.
ISCAS 2008: 472-475 |
| 5 |  | Davide De Caro,
Nicola Petra,
Antonio G. M. Strollo:
Reducing Lookup-Table Size in Direct Digital Frequency Synthesizers Using Optimized Multipartite Table Method.
IEEE Trans. on Circuits and Systems 55-I(7): 2116-2127 (2008) |
| 2007 |
| 4 |  | Nicola Petra,
Davide De Caro,
Antonio G. M. Strollo:
A Novel Architecture for Galois Fields GF(2^m) Multipliers Based on Mastrovito Scheme.
IEEE Trans. Computers 56(11): 1470-1483 (2007) |
| 2005 |
| 3 |  | Antonio G. M. Strollo,
Davide De Caro,
Ettore Napoli,
Nicola Petra:
A novel high-speed sense-amplifier-based flip-flop.
IEEE Trans. VLSI Syst. 13(11): 1266-1274 (2005) |
| 2003 |
| 2 |  | Antonio G. M. Strollo,
Davide De Caro:
Direct digital frequency synthesizers exploiting piecewise linear Chebyshev approximation.
Microelectronics Journal 34(11): 1099-1106 (2003) |
| 2000 |
| 1 |  | Antonio G. M. Strollo,
Ettore Napoli,
Davide De Caro:
New clock-gating techniques for low-power flip-flops.
ISLPED 2000: 114-119 |