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P. Canet Coauthor index pubzone.org

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DBLP keys2009
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJ. Postel-Pellerin, F. Lalande, P. Canet, Rachid Bouchakour, F. Jeuland, B. Bertello, B. Villard: Extraction of 3D parasitic capacitances in 90 nm and 22 nm NAND flash memories. Microelectronics Reliability 49(9-11): 1056-1059 (2009)
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJ. Postel-Pellerin, F. Lalande, P. Canet, Rachid Bouchakour, F. Jeuland, L. Morancho: Modeling charge variation during data retention of MLC Flash memories. Microelectronics Reliability 49(9-11): 1060-1063 (2009)
2002
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLR. Laffont, J. Razafindramora, P. Canet, Rachid Bouchakour, J. M. Mirabel: Decreasing EEPROM Programming Bias With Negative Voltage, Reliability Impact. MTDT 2002: 168-176
2001
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRachid Bouchakour, N. Harabech, P. Canet, Ph. Boivin, J. M. Mirabel: Modeling of a floating-gate EEPROM cell using a charge sheet approach including variable tunneling capacitance and polysilicon gate depletion effect. ISCAS (4) 2001: 822-825
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLP. Canet, Rachid Bouchakour, N. Harabech, Ph. Boivin, J. M. Mirabel: EEPROM programming study-time and degradation aspects. ISCAS (4) 2001: 846-849

Coauthor Index

1B. Bertello [5]
2Ph. Boivin [1] [2]
3Rachid Bouchakour [1] [2] [3] [4] [5]
4N. Harabech [1] [2]
5F. Jeuland [4] [5]
6R. Laffont [3]
7F. Lalande [4] [5]
8J. M. Mirabel [1] [2] [3]
9L. Morancho [4]
10J. Postel-Pellerin [4] [5]
11J. Razafindramora [3]
12B. Villard [5]

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