Gabriel Caffarena

	2012
16		Gabriel Caffarena, Olivier Sentieys, Daniel Menard, Juan A. López, David Novo: Quantization of VLSI digital signal processing systems. EURASIP J. Adv. Sig. Proc. 2012: 32 (2012)
	2010
15		Gabriel Caffarena, Carlos Carreras, Juan A. López, Angel Fernandez Herrero: Fast fixed-point optimization of DSP algorithms. VLSI-SoC 2010: 195-200
14		Gabriel Caffarena, Carlos Carreras: Architectural synthesis of DSP circuits under simultaneous error and time constraints. VLSI-SoC 2010: 322-327
13		Gabriel Caffarena, Angel Fernandez Herrero, Juan A. López, Carlos Carreras: Fast Fixed-Point Optimization of DSP Algorithms. VLSI-SoC (Selected Papers) 2010: 182-205
12		Gabriel Caffarena, Carlos Carreras, Juan A. López, Angel Fernandez Herrero: SQNR Estimation of Fixed-Point DSP Algorithms. EURASIP J. Adv. Sig. Proc. 2010: (2010)
	2009
11		Slobodan Bojanic, Vukasin Pejovic, Gabriel Caffarena, Vladimir Milovanovic, Carlos Carreras, Jelena Popovic: Behavioural Biometrics Hardware Based on Bioinformatics Matching. CISIS 2009: 171-178
10		Gabriel Caffarena, Juan A. López, Gerardo Leyva, Carlos Carreras, Octavio Nieto-Taladriz: Architectural Synthesis of Fixed-Point DSP Datapaths Using FPGAs. Int. J. Reconfig. Comp. 2009: (2009)
	2008
9		Gabriel Caffarena, Juan A. López, Gerardo Leyva, Carlos Carreras, Octavio Nieto-Taladriz: Optimized Architectural Synthesis of Fixed-Point Datapaths. ReConFig 2008: 85-90
	2007
8		Ruzica Jevtic, Carlos Carreras, Gabriel Caffarena: Switching Activity Models for Power Estimation in FPGA Multipliers. ARC 2007: 201-213
7		Gabriel Caffarena, Carlos E. Pedreira, Carlos Carreras, Slobodan Bojanic, Octavio Nieto-Taladriz: Fpga Acceleration for DNA Sequence Alignment. Journal of Circuits, Systems, and Computers 16(2): 245-266 (2007)
	2006
6		Angel Fernandez Herrero, Alberto Jimenez-Pacheco, Gabriel Caffarena, Javier Casajús-Quirós: Design and Implementation of a Hardware Module for Equalisation in A 4G MIMO Receiver. FPL 2006: 1-4
5		Gabriel Caffarena, Juan A. López, Carlos Carreras, Octavio Nieto-Taladriz: High-Level Synthesis of Multiple Word-Length DSP Algorithms Using Heterogeneous-Resource FPGAs. FPL 2006: 1-4
4		Slobodan Bojanic, Gabriel Caffarena, Slobodan Petrovic, Octavio Nieto-Taladriz: FPGA for pseudorandom generator cryptanalysis. Microprocessors and Microsystems 30(2): 63-71 (2006)
	2004
3		Gerardo Leyva, Gabriel Caffarena, Carlos Carreras, Octavio Nieto-Taladriz: A Generator of High-Speed Floating-Point Modules. FCCM 2004: 306-307
2		Gabriel Caffarena, Slobodan Bojanic, Juan A. López, Carlos E. Pedreira, Octavio Nieto-Taladriz: High-speed systolic array for gene matching. FPGA 2004: 248
	2003
1		Juan A. López, Carlos Carreras, Gabriel Caffarena, Octavio Nieto-Taladriz: Fast characterization of the noise bounds derived from coefficient and signal quantization. ISCAS (4) 2003: 309-312

Coauthor Index

1	Slobodan Bojanic	[2] [4] [7] [11]
2	Carlos Carreras	[1] [3] [5] [7] [8] [9] [10] [11] [12] [13] [14] [15]
3	Javier Casajús-Quirós	[6]
4	Angel Fernandez Herrero	[6] [12] [13] [15]
5	Ruzica Jevtic	[8]
6	Alberto Jimenez-Pacheco	[6]
7	Gerardo Leyva	[3] [9] [10]
8	Juan A. López	[1] [2] [5] [9] [10] [12] [13] [15] [16]
9	Daniel Menard	[16]
10	Vladimir Milovanovic	[11]
11	Octavio Nieto-Taladriz	[1] [2] [3] [4] [5] [7] [9] [10]
12	David Novo	[16]
13	Carlos E. Pedreira	[2] [7]
14	Vukasin Pejovic	[11]
15	Slobodan Petrovic	[4]
16	Jelena Popovic	[11]
17	Olivier Sentieys	[16]

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