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Paulo F. Butzen Coauthor index pubzone.org

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DBLP keys2011
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVinícius Dal Bem, Paulo F. Butzen, Felipe S. Marranghello, André Inácio Reis, Renato P. Ribas: Impact and optimization of lithography-aware regular layout in digital circuit design. ICCD 2011: 279-284
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJohn Keane, S. Venkatraman, Paulo F. Butzen, Chris H. Kim: An Array-Based Test Circuit for Fully Automated Gate Dielectric Breakdown Characterization. IEEE Trans. VLSI Syst. 19(5): 787-795 (2011)
2010
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, Vinícius Dal Bem, André Inácio Reis, Renato P. Ribas: Leakage Analysis Considering the Effect of Inter-Cell Wire Resistance for Nanoscaled CMOS Circuits. J. Low Power Electronics 6(1): 192-200 (2010)
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, Leomar S. da Rosa Jr., Erasmo J. D. Chiappetta Filho, André Inácio Reis, Renato P. Ribas: Standby power consumption estimation by interacting leakage current mechanisms in nanoscaled CMOS digital circuits. Microelectronics Journal 41(4): 247-255 (2010)
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, Vinícius Dal Bem, André Inácio Reis, Renato P. Ribas: Transistor network restructuring against NBTI degradation. Microelectronics Reliability 50(9-11): 1298-1303 (2010)
2009
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, André Inácio Reis, Renato P. Ribas: Routing Resistance Influence in Loading Effect on Leakage Analysis. PATMOS 2009: 317-325
2008
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, Leomar S. da Rosa Jr., Erasmo J. D. Chiappetta Filho, Dionatan S. Moura, André Inácio Reis, Renato P. Ribas: Simple and accurate method for fast static currentestimation in cmos complex gates with interaction ofleakage mechanisms. ACM Great Lakes Symposium on VLSI 2008: 407-410
2007
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, André Inácio Reis, Chris H. Kim, Renato P. Ribas: Modeling and estimating leakage current in series-parallel CMOS networks. ACM Great Lakes Symposium on VLSI 2007: 269-274
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, André Inácio Reis, Chris H. Kim, Renato P. Ribas: Modeling Subthreshold Leakage Current in General Transistor Networks. ISVLSI 2007: 512-513
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPaulo F. Butzen, André Inácio Reis, Chris H. Kim, Renato P. Ribas: Subthreshold Leakage Modeling and Estimation of General CMOS Complex Gates. PATMOS 2007: 474-484

Coauthor Index

1Vinícius Dal Bem [6] [8] [10]
2Erasmo J. D. Chiappetta Filho [4] [7]
3John Keane [9]
4Chris H. Kim [1] [2] [3] [9]
5Felipe S. Marranghello [10]
6Dionatan S. Moura [4]
7André Inácio Reis [1] [2] [3] [4] [5] [6] [7] [8] [10]
8Renato P. Ribas [1] [2] [3] [4] [5] [6] [7] [8] [10]
9Leomar S. da Rosa Jr. (Leomar Soares da Rosa Jr.) [4] [7]
10S. Venkatraman [9]

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