Alfred L. Burress

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2003

4 Parag K. Lala, Alfred L. Burress: Self-checking logic design for FPGA implementation. IEEE T. Instrumentation and Measurement 52(5): 1391-1398 (2003)

1999

3 Parag K. Lala, Alfred L. Burress: Self-Checking Logic Design for LUT-Based FPGAs. FPGA 1999: 253

2 Parag K. Lala, Alfred L. Burress: A technique for designing self-checking logic for FPGAs. ISCAS (1) 1999: 94-96

1997

1 Alfred L. Burress, Parag K. Lala: On-Line Testable Logic Desgin for FPGA Implementation. ITC 1997: 471-478

	2003
4		Parag K. Lala, Alfred L. Burress: Self-checking logic design for FPGA implementation. IEEE T. Instrumentation and Measurement 52(5): 1391-1398 (2003)
	1999
3		Parag K. Lala, Alfred L. Burress: Self-Checking Logic Design for LUT-Based FPGAs. FPGA 1999: 253
2		Parag K. Lala, Alfred L. Burress: A technique for designing self-checking logic for FPGAs. ISCAS (1) 1999: 94-96
	1997
1		Alfred L. Burress, Parag K. Lala: On-Line Testable Logic Desgin for FPGA Implementation. ITC 1997: 471-478

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