 | 2012 |
| 27 |  | Ahmed Yasir Dogan,
Jeremy Constantin,
Martino Ruggiero,
Andreas Burg,
David Atienza:
Multi-core architecture design for ultra-low-power wearable health monitoring systems.
DATE 2012: 988-993 |
| 26 |  | Jeremy Constantin,
Andreas Burg,
Frank K. Gürkaynak:
Investigating the Potential of Custom Instruction Set Extensions for SHA-3 Candidates on a 16-bit Microcontroller Architecture.
IACR Cryptology ePrint Archive 2012: 50 (2012) |
| 2011 |
| 25 |  | Christoph Roth,
Alessandro Cevrero,
Christoph Studer,
Yusuf Leblebici,
Andreas Burg:
Area, throughput, and energy-efficiency trade-offs in the VLSI implementation of LDPC decoders.
ISCAS 2011: 1772-1775 |
| 24 |  | Ahmed Yasir Dogan,
David Atienza,
Andreas Burg,
Igor Loi,
Luca Benini:
Power/Performance Exploration of Single-core and Multi-core Processor Approaches for Biomedical Signal Processing.
PATMOS 2011: 102-111 |
| 23 |  | Simon Heinzle,
Pierre Greisen,
David Gallup,
Christine Chen,
Daniel Saner,
Aljoscha Smolic,
Andreas Burg,
Wojciech Matusik,
Markus H. Gross:
Computational stereo camera system with programmable control loop.
ACM Trans. Graph. 30(4): 94 (2011) |
| 22 |  | Pierre Greisen,
Simon Heinzle,
Markus H. Gross,
Andreas Burg:
An FPGA-based processing pipeline for high-definition stereo video.
EURASIP J. Image and Video Processing 2011: 18 (2011) |
| 2010 |
| 21 |  | Lukas Bruderer,
Christoph Studer,
Markus Wenk,
Dominik Seethaler,
Andreas Burg:
VLSI implementation of a low-complexity LLL lattice reduction algorithm for MIMO detection.
ISCAS 2010: 3745-3748 |
| 20 |  | Patrick Maechler,
Pierre Greisen,
Norbert Felber,
Andreas Burg:
Matching pursuit: Evaluation and implementatio for LTE channel estimation.
ISCAS 2010: 589-592 |
| 19 |  | Markus Wenk,
Lukas Bruderer,
Andreas Burg,
Christoph Studer:
Area- and throughput-optimized VLSI architecture of sphere decoding.
VLSI-SoC 2010: 189-194 |
| 18 |  | Christoph Studer,
Markus Wenk,
Andreas Burg:
VLSI Implementation of Hard- and Soft-Output Sphere Decoding for Wide-Band MIMO Systems.
VLSI-SoC (Selected Papers) 2010: 128-154 |
| 17 |  | Christoph Studer,
Markus Wenk,
Andreas Burg:
MIMO Transmission with Residual Transmit-RF Impairments
CoRR abs/1002.0406: (2010) |
| 16 |  | Pierre Greisen,
Simon Haene,
Andreas Burg:
Simulation and Emulation of MIMO Wireless Baseband Transceivers.
EURASIP J. Wireless Comm. and Networking 2010: (2010) |
| 2009 |
| 15 |  | Stefan Eberli,
Andreas Burg,
Wolfgang Fichtner:
Implementation of a 2×2 MIMO-OFDM receiver on an application specific processor.
Microelectronics Journal 40(11): 1642-1649 (2009) |
| 2008 |
| 14 |  | Christoph Studer,
Andreas Burg,
Helmut Bölcskei:
Soft-output sphere decoding: algorithms and VLSI implementation.
IEEE Journal on Selected Areas in Communications 26(2): 290-300 (2008) |
| 13 |  | Simon Haene,
David Perels,
Andreas Burg:
A Real-Time 4-Stream MIMO-OFDM Transceiver: System Design, FPGA Implementation, and Characterization.
IEEE Journal on Selected Areas in Communications 26(6): 877-889 (2008) |
| 2007 |
| 12 |  | C. Hess,
Markus Wenk,
Andreas Burg,
Peter Luethi,
Christoph Studer,
Norbert Felber,
Wolfgang Fichtner:
Reduced-complexity mimo detector with close-to ml error rate performance.
ACM Great Lakes Symposium on VLSI 2007: 200-203 |
| 11 |  | Simon Haene,
Andreas Burg,
Peter Luethi,
Norbert Felber,
Wolfgang Fichtner:
FFT Processor for OFDM Channel Estimation.
ISCAS 2007: 1417-1420 |
| 10 |  | Peter Luethi,
Andreas Burg,
Simon Haene,
David Perels,
Norbert Felber,
Wolfgang Fichtner:
VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition.
ISCAS 2007: 1421-1424 |
| 9 |  | Andreas Burg,
Simon Haene,
Wolfgang Fichtner,
Markus Rupp:
Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation.
ISCAS 2007: 3530-3533 |
| 8 |  | Andreas Burg,
Dominik Seethaler,
Gerald Matz:
VLSI Implementation of a Lattice-Reduction Algorithm for Multi-Antenna Broadcast Precoding.
ISCAS 2007: 673-676 |
| 2006 |
| 7 |  | Andreas Burg,
Moritz Borgmann,
Markus Wenk,
Christoph Studer,
Helmut Bölcskei:
Advanced receiver algorithms for MIMO wireless communications.
DATE 2006: 593-598 |
| 6 |  | Andreas Burg,
Simon Haene,
David Perels,
Peter Luethi,
Norbert Felber,
Wolfgang Fichtner:
Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems.
ISCAS 2006 |
| 5 |  | Markus Wenk,
M. Zellweger,
Andreas Burg,
Norbert Felber,
Wolfgang Fichtner:
K-best MIMO detection VLSI architectures achieving up to 424 Mbps.
ISCAS 2006 |
| 4 |  | Simon Haene,
Andreas Burg,
David Perels,
Peter Luethi,
Norbert Felber,
Wolfgang Fichtner:
Silicon implementation of an MMSE-based soft demapper for MIMO-BICM.
ISCAS 2006 |
| 2004 |
| 3 |  | Frank K. Gürkaynak,
Andreas Burg,
Norbert Felber,
Wolfgang Fichtner,
D. Gasser,
F. Hug,
Hubert Kaeslin:
A 2 Gb/s balanced AES crypto-chip implementation.
ACM Great Lakes Symposium on VLSI 2004: 39-44 |
| 2003 |
| 2 |  | Andreas Burg,
Frank K. Gürkaynak,
Hubert Kaeslin,
Wolfgang Fichtner:
Variable delay ripple carry adder with carry chain interrupt detection.
ISCAS (5) 2003: 113-116 |
| 1 |  | Markus Rupp,
Andreas Burg,
Eric Beck:
Rapid prototyping for wireless designs: the five-ones approach.
Signal Processing 83(7): 1427-1444 (2003) |