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| 2012 | ||
|---|---|---|
| 39 | Daniel Kopta, Thiago Ize, Josef B. Spjut, Erik Brunvand, Al Davis, Andrew E. Kensler: Fast, effective BVH updates for animated scenes. I3D 2012: 197-204 | |
| 2011 | ||
| 38 | Erik Brunvand, Paul Stout: Kinetic art and embedded systems: a natural collaboration. SIGCSE 2011: 323-328 | |
| 37 | Erik Brunvand: Games as motivation in computer design courses: I/O is the key. SIGCSE 2011: 33-38 | |
| 2010 | ||
| 36 | R. Iris Bahar, Fabrizio Lombardi, David Atienza, Erik Brunvand: Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, Providence, Rhode Island, USA, May 16-18 2010 ACM 2010 | |
| 35 | Daniel Kopta, Josef B. Spjut, Erik Brunvand, Al Davis: Efficient MIMD architectures for high-performance ray tracing. ICCD 2010: 9-16 | |
| 34 | David W. Nellans, Kshitij Sudan, Erik Brunvand, Rajeev Balasubramonian: Improving Server Performance on Multi-cores via Selective Off-Loading of OS Functionality. ISCA Workshops 2010: 275-292 | |
| 33 | David W. Nellans, Kshitij Sudan, Rajeev Balasubramonian, Erik Brunvand: Hardware prediction of OS run-length for fine-grained resource customization. ISPASS 2010: 111-112 | |
| 2009 | ||
| 32 | Josef B. Spjut, Andrew E. Kensler, Erik Brunvand: Hardware-accelerated gradient noise for graphics. ACM Great Lakes Symposium on VLSI 2009: 457-462 | |
| 31 | Josef B. Spjut, Andrew E. Kensler, Daniel Kopta, Erik Brunvand: TRaX: A Multicore Hardware Architecture for Real-Time Ray Tracing. IEEE Trans. on CAD of Integrated Circuits and Systems 28(12): 1802-1815 (2009) | |
| 30 | David W. Nellans, Rajeev Balasubramonian, Erik Brunvand: OS execution on multi-cores: is out-sourcing worthwhile? Operating Systems Review 43(2): 104-105 (2009) | |
| 2008 | ||
| 29 | Josef B. Spjut, Solomon Boulos, Daniel Kopta, Erik Brunvand, Spencer Kellis: TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing. SASP 2008: 108-114 | |
| 28 | Peter Shirley, Kelvin Sung, Erik Brunvand, Alan L. Davis, Steven G. Parker, Solomon Boulos: Fast ray tracing and the potential effects on graphics and gaming courses. Computers & Graphics 32(2): 260-267 (2008) | |
| 2005 | ||
| 27 | Gaurav Gulati, Erik Brunvand: Design of a cell library for asynchronous microengines. ACM Great Lakes Symposium on VLSI 2005: 385-389 | |
| 2004 | ||
| 26 | David W. Nellans, Vamshi Krishna Kadaru, Erik Brunvand: ARCS: an architectural level communication driven simulator. ACM Great Lakes Symposium on VLSI 2004: 73-77 | |
| 2003 | ||
| 25 | Jung-Lin Yang, Erik Brunvand: Using dynamic domino circuits in self-timed systems. ACM Great Lakes Symposium on VLSI 2003: 253-256 | |
| 24 | Jung-Lin Yang, Erik Brunvand: Self-Timed Design with Dynamic Domino Circuits. ISVLSI 2003: 217-219 | |
| 2000 | ||
| 23 | Hans M. Jacobson, Erik Brunvand, Ganesh Gopalakrishnan, Prabhakar Kudva: High-Level Asynchronous System Design Using the ACK Framework. ASYNC 2000: 93-103 | |
| 1999 | ||
| 22 | Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun: Practical Advances in Asynchronous Design and in Asynchronous/Synchronous Interfaces. DAC 1999: 104-109 | |
| 21 | John B. Carter, Wilson C. Hsieh, Leigh Stoller, Mark R. Swanson, Lixin Zhang, Erik Brunvand, Al Davis, Chen-Chi Kuo, Ravindra Kuramkote, Michael Parker, Lambert Schaelicke, Terry Tateyama: Impulse: Building a Smarter Memory Controller. HPCA 1999: 70-79 | |
| 20 | Ganesh Gopalakrishnan, Prabhakar Kudva, Erik Brunvand: Peephole optimization of asynchronous macromodule networks. IEEE Trans. VLSI Syst. 7(1): 30-37 (1999) | |
| 1998 | ||
| 19 | John B. Carter, Wilson C. Hsieh, Mark R. Swanson, Lixin Zhang, Erik Brunvand, Al Davis, Chen-Chi Kuo, Ravindra Kuramkote, Michael Parker, Lambert Schaelicke, Leigh Stoller, Terry Tateyama: Memory System Support for Irregular Applications. LCR 1998: 17-26 | |
| 1997 | ||
| 18 | Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun: Practical Advances in Asynchronous Design. ICCD 1997: 662-668 | |
| 17 | Ajay Khoche, Erik Brunvand: ACT: A DFT Tool for Self-Timed Circuits. ITC 1997: 829-837 | |
| 16 | Ajay Khoche, Erik Brunvand: Critical hazard free test generation for asynchronous circuits. VTS 1997: 203-209 | |
| 1996 | ||
| 15 | V. Chandramouli, Erik Brunvand, Kent F. Smith: Self-Timed Design in GaAs - Case Study of a High-Speed, Parallel Multiplier. IEEE Trans. VLSI Syst. 4(1): 146 (1996) | |
| 1995 | ||
| 14 | Erik Brunvand: Low latency self-timed flow-through FIFOs. ARVLSI 1995: 76-90 | |
| 13 | Ajay Khoche, Erik Brunvand: Testing self-timed circuits using partial scan. ASYNC 1995: 160-169 | |
| 12 | Sandeep Pagey, Ajay Khoche, Erik Brunvand: DFT for fast testing of self-timed control circuits. Asian Test Symposium 1995: 382-386 | |
| 11 | Jae-Tack Yoo, Erik Brunvand, Kent F. Smith: Automatic rapid prototyping of semi-custom VLSI circuits using Actel FPGAs. Great Lakes Symposium on VLSI 1995: 148-151 | |
| 10 | William F. Richardson, Erik Brunvand: Precise exception handling for a self-timed processor. ICCD 1995: 32-37 | |
| 9 | Ajay Khoche, Erik Brunvand: A partial scan methodology for testing self-timed circuits. VTS 1995: 283-289 | |
| 1994 | ||
| 8 | Prabhakar Kudva, Ganesh Gopalakrishnan, Erik Brunvand, Venkatesh Akella: Performance Analysis and Optimization of Asynchronous Circuits. ICCD 1994: 221-224 | |
| 7 | Ganesh Gopalakrishnan, Prabhakar Kudva, Erik Brunvand: Peephole Optimization of Asynchronous Macromodule Networks. ICCD 1994: 442-446 | |
| 6 | Ganesh Gopalakrishnan, Erik Brunvand, Nick Michell, Steven M. Nowick: A correctness criterion for asynchronous circuit validation and optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 13(11): 1309-1318 (1994) | |
| 5 | Erik Brunvand: Designing self-timed systems using concurrent programs. VLSI Signal Processing 7(1-2): 47-59 (1994) | |
| 1993 | ||
| 4 | Erik Brunvand: Using FPGAs to implement self-timed systems. VLSI Signal Processing 6(2): 173-190 (1993) | |
| 1992 | ||
| 3 | Erik Brunvand: Using FPLs to Prototoype a Self-Timed Computer. FPL 1992: 192-198 | |
| 2 | Erik Brunvand, Nick Michell, Kent F. Smith: A Comparison of Self-Timed Design Using FPGA, CMOS, and GaAs Technologies. ICCD 1992: 76-80 | |
| 1991 | ||
| 1 | Erik Brunvand, M. Starkey: An Integrated Environment for the Design and Simulation of Self-Timed Systems. VLSI 1991: 137-146 | |
Colors in the list of coauthors
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