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| 2012 | ||
|---|---|---|
| 72 | Wonyoung Kim, David Brooks, Gu-Yeon Wei: A Fully-Integrated 3-Level DC-DC Converter for Nanosecond-Scale DVFS. J. Solid-State Circuits 47(1): 206-219 (2012) | |
| 71 | Michael J. Lyons, Mark Hempstead, Gu-Yeon Wei, David Brooks: The accelerator store: A shared memory framework for accelerator-based systems. TACO 8(4): 48 (2012) | |
| 2011 | ||
| 70 | David Brooks: The alarms project: A hardware/software approach to addressing parameter variations. ASP-DAC 2011: 291 | |
| 69 | Peter Bailis, Vijay Janapa Reddi, Sanjay Gandhi, David Brooks, Margo I. Seltzer: Dimetrodon: processor-level preventive thermal management via idle cycle injection. DAC 2011: 89-94 | |
| 68 | Krishna K. Rangan, Michael D. Powell, Gu-Yeon Wei, David Brooks: Achieving uniform performance and maximizing throughput in the presence of heterogeneity. HPCA 2011: 3-14 | |
| 67 | Javier Lira, Carlos Molina, David Brooks, Antonio González: Implementing a hybrid SRAM / eDRAM NUCA architecture. HiPC 2011: 1-10 | |
| 66 | Pierre-Emile Duhamel, Judson Porter, Benjamin M. Finio, Geoffrey Barrows, David Brooks, Gu-Yeon Wei, Robert J. Wood: Hardware in the loop for optical flow sensing in a robotic bee. IROS 2011: 1099-1106 | |
| 65 | Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David Brooks: Voltage Noise in Production Processors. IEEE Micro 31(1): 20-28 (2011) | |
| 64 | David Brooks: CPUs, GPUs, and Hybrid Computing. IEEE Micro 31(5): 4-6 (2011) | |
| 63 | Kevin Brownell, Ali Durlov Khan, Gu-Yeon Wei, David Brooks: Automating Design of Voltage Interpolation to Address Process Variations. IEEE Trans. VLSI Syst. 19(3): 383-396 (2011) | |
| 62 | Vijay Janapa Reddi, David Brooks: Resilient Architectures via Collaborative Design: Maximizing Commodity Processor Performance in the Presence of Variations. IEEE Trans. on CAD of Integrated Circuits and Systems 30(10): 1429-1445 (2011) | |
| 2010 | ||
| 61 | Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Simone Campanoni, Michael D. Smith, Gu-Yeon Wei, David Brooks: Voltage Smoothing: Characterizing and Mitigating Voltage Noise in Production Processors via Software-Guided Thread Scheduling. MICRO 2010: 77-88 | |
| 60 | Michael J. Lyons, Mark Hempstead, Gu-Yeon Wei, David Brooks: The Accelerator Store framework for high-performance, low-power accelerator-based systems. Computer Architecture Letters 9(2): 53-56 (2010) | |
| 59 | Vijay Janapa Reddi, Meeta Sharma Gupta, Glenn H. Holloway, Michael D. Smith, Gu-Yeon Wei, David Brooks: Predicting Voltage Droops Using Recurring Program and Microarchitectural Event Activity. IEEE Micro 30(1): 110 (2010) | |
| 58 | Benjamin C. Lee, David Brooks: Applied inference: Case studies in microarchitectural design. TACO 7(2): (2010) | |
| 57 | Vijay Janapa Reddi, Simone Campanoni, Meeta Sharma Gupta, Michael D. Smith, Gu-Yeon Wei, David Brooks, Kim M. Hazelwood: Eliminating voltage emergencies via software-guided code transformations. TACO 7(2): (2010) | |
| 2009 | ||
| 56 | Mark Hempstead, Gu-Yeon Wei, David Brooks: An accelerator-based wireless sensor network processor in 130nm CMOS. CASES 2009: 215-222 | |
| 55 | Vijay Janapa Reddi, Meeta Sharma Gupta, Glenn H. Holloway, Gu-Yeon Wei, Michael D. Smith, David Brooks: Voltage emergency prediction: Using signatures to reduce operating margins. HPCA 2009: 18-29 | |
| 54 | Kristen Lovin, Benjamin C. Lee, Xiaoyao Liang, David Brooks, Gu-Yeon Wei: Empirical performance models for 3T1D memories. ICCD 2009: 398-403 | |
| 53 | Xiaoyao Liang, Benjamin C. Lee, Gu-Yeon Wei, David Brooks: Design and test strategies for microarchitectural post-fabrication tuning. ICCD 2009: 84-90 | |
| 52 | Krishna K. Rangan, Gu-Yeon Wei, David Brooks: Thread motion: fine-grained power management for multi-core systems. ISCA 2009: 302-313 | |
| 51 | Michael J. Lyons, David Brooks: The design of a bloom filter hardware accelerator for ultra low power systems. ISLPED 2009: 371-376 | |
| 50 | Kevin Brownell, Ali Durlov Khan, David Brooks, Gu-Yeon Wei: Place and route considerations for voltage interpolated designs. ISQED 2009: 594-600 | |
| 49 | Meeta Sharma Gupta, Jude A. Rivers, Pradip Bose, Gu-Yeon Wei, David Brooks: Tribeca: design for PVT variations with local recovery and fine-grained adaptation. MICRO 2009: 435-446 | |
| 48 | Xiaoyao Liang, Gu-Yeon Wei, David Brooks: Revival: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency. IEEE Micro 29(1): 127-138 (2009) | |
| 47 | Lukasz Strozek, David Brooks: Energy- and area-efficient architectures through application clustering and architectural heterogeneity. TACO 6(1): (2009) | |
| 2008 | ||
| 46 | Benjamin C. Lee, David Brooks: Efficiency trends and limits from comprehensive microarchitectural adaptivity. ASPLOS 2008: 36-47 | |
| 45 | Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, David Brooks: System level analysis of fast, per-core DVFS using on-chip switching regulators. HPCA 2008: 123-134 | |
| 44 | Kevin Brownell, Gu-Yeon Wei, David Brooks: Evaluation of voltage interpolation to address process variations. ICCAD 2008: 529-536 | |
| 43 | Xiaoyao Liang, Gu-Yeon Wei, David Brooks: ReVIVaL: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency. ISCA 2008: 191-202 | |
| 42 | Mark Hempstead, Gu-Yeon Wei, David Brooks: System design considerations for sensor network applications. ISCAS 2008: 2566-2569 | |
| 41 | Gu-Yeon Wei, David Brooks, Ali Durlov Khan, Xiaoyao Liang: Instruction-driven clock scheduling with glitch mitigation. ISLPED 2008: 357-362 | |
| 40 | Benjamin C. Lee, Jamison D. Collins, Hong Wang, David Brooks: CPR: Composable performance regression for scalable multiprocessor models. MICRO 2008: 270-281 | |
| 39 | Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David Brooks: Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability. IEEE Micro 28(1): 60-68 (2008) | |
| 38 | Sarita V. Adve, David Brooks, Craig B. Zilles: Guest Editors' Introduction: Top Picks from the Computer Architecture Conferences of 2007. IEEE Micro 28(1): 8-11 (2008) | |
| 37 | Mark Hempstead, Michael J. Lyons, David Brooks, Gu-Yeon Wei: Survey of Hardware Systems for Wireless Sensor Networks. J. Low Power Electronics 4(1): 11-20 (2008) | |
| 2007 | ||
| 36 | Xiaoyao Liang, Kerem Turgay, David Brooks: Architectural power models for SRAM and CAM structures based on hybrid analytical/empirical techniques. ICCAD 2007: 824-830 | |
| 35 | Meeta Sharma Gupta, Krishna K. Rangan, Michael D. Smith, Gu-Yeon Wei, David Brooks: Towards a software approach to mitigate voltage emergencies. ISLPED 2007: 123-128 | |
| 34 | Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David Brooks: Process Variation Tolerant 3T1D-Based Cache Architectures. MICRO 2007: 15-26 | |
| 33 | David Brooks, Robert P. Dick, Russ Joseph, Li Shang: Power, Thermal, and Reliability Modeling in Nanometer-Scale Microprocessors. IEEE Micro 27(3): 49-62 (2007) | |
| 2006 | ||
| 32 | Lukasz Strozek, David Brooks: Efficient architectures through application clustering and architectural heterogeneity. CASES 2006: 190-200 | |
| 31 | Mark Hempstead, Gu-Yeon Wei, David Brooks: Architecture and circuit techniques for low-throughput, energy-constrained systems across technology generations. CASES 2006: 368-378 | |
| 30 | Yingmin Li, Benjamin C. Lee, David Brooks, Zhigang Hu, Kevin Skadron: CMP design space exploration subject to physical constraints. HPCA 2006: 17-28 | |
| 29 | Xiaoyao Liang, David Brooks: Microarchitecture parameter selection to optimize system performance under process variation. ICCAD 2006: 429-436 | |
| 28 | Wai-Chi Fang, Sharon Kedar, Susan Owen, Gu-Yeon Wei, David Brooks, Jonathan Lees: System-on-Chip Architecture Design for Intelligent Sensor Networks. IIH-MSP 2006: 579-582 | |
| 27 | Xiaoyao Liang, David Brooks: Mitigating the Impact of Process Variations on Processor Register Files and Execution Units. MICRO 2006: 504-514 | |
| 26 | Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks: Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance. IEEE Micro 26(1): 119-129 (2006) | |
| 2005 | ||
| 25 | Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadron: Performance, Energy, and Thermal Considerations for SMT and CMP Architectures. HPCA 2005: 71-82 | |
| 24 | Mark Hempstead, Nikhil Tripathi, Patrick Mauro, Gu-Yeon Wei, David Brooks: An Ultra Low Power System Architecture for Sensor Network Applications. ISCA 2005: 208-219 | |
| 23 | Yingmin Li, Mark Hempstead, Patrick Mauro, David Brooks, Zhigang Hu, Kevin Skadron: Power and thermal effects of SRAM vs. Latch-Mux design styles and clock gating choices. ISLPED 2005: 173-178 | |
| 22 | Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks: A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. MICRO 2005: 271-282 | |
| 2004 | ||
| 21 | Yau Chin, John Sheu, David Brooks: Evaluating Techniques for Exploiting Instruction Slack. ICCD 2004: 375-378 | |
| 20 | David Brooks, Mark Lee: Learning Syntax from Function Words. ICGI 2004: 273-274 | |
| 19 | Kim M. Hazelwood, David Brooks: Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization. ISLPED 2004: 326-331 | |
| 18 | Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadron, Pradip Bose: Understanding the energy efficiency of simultaneous multithreading. ISLPED 2004: 44-49 | |
| 17 | Mark Hempstead, Matt Welsh, David Brooks: TinyBench: The Case For A Standardized Benchmark Suite for TinyOS Based Wireless Sensor Network Devices. LCN 2004: 585-586 | |
| 16 | Victor V. Zyuban, David Brooks, Viji Srinivasan, Michael Gschwind, Pradip Bose, Philip N. Strenski, Philip G. Emma: Integrated Analysis of Power and Performance for Pipelined Microprocessors. IEEE Trans. Computers 53(8): 1004-1016 (2004) | |
| 15 | David Brooks, Pradip Bose, Margaret Martonosi: Power-performance simulation: design and validation strategies. SIGMETRICS Performance Evaluation Review 31(4): 13-18 (2004) | |
| 2003 | ||
| 14 | Russ Joseph, David Brooks, Margaret Martonosi: Control Techniques to Eliminate Voltage Emergencies in High Performance Processors. HPCA 2003: 79-90 | |
| 13 | James Ellsmere, Jeffrey A. Stoll, David W. Rattner, David Brooks, Robert Kane, William M. Wells III, Ron Kikinis, Kirby G. Vosburgh: A Navigation System for Augmenting Laparoscopic Ultrasound. MICCAI (2) 2003: 184-191 | |
| 12 | David Brooks, Pradip Bose, Viji Srinivasan, Michael Gschwind, Philip G. Emma, Michael G. Rosenfield: New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors. IBM Journal of Research and Development 47(5-6): 653-670 (2003) | |
| 2002 | ||
| 11 | Viji Srinivasan, David Brooks, Michael Gschwind, Pradip Bose, Victor V. Zyuban, Philip N. Strenski, Philip G. Emma: Optimizing pipelines for power and performance. MICRO 2002: 333-344 | |
| 10 | Pradip Bose, David Brooks, Alper Buyuktosunoglu, Peter W. Cook, K. Das, Philip G. Emma, Michael Gschwind, Hans M. Jacobson, Tejas Karkhanis, Prabhakar Kudva, Stanley Schuster, James E. Smith, Viji Srinivasan, Victor V. Zyuban, David H. Albonesi, Sandhya Dwarkadas: Early-Stage Definition of LPX: A Low Power Issue-Execute Processor. PACS 2002: 1-17 | |
| 2001 | ||
| 9 | Alper Buyuktosunoglu, David H. Albonesi, Stanley Schuster, David Brooks, Pradip Bose, Peter W. Cook: A circuit level implementation of an adaptive issue queue for power-aware microprocessors. ACM Great Lakes Symposium on VLSI 2001: 73-78 | |
| 8 | David Brooks, Margaret Martonosi: Dynamic Thermal Management for High-Performance Microprocessors. HPCA 2001: 171-182 | |
| 2000 | ||
| 7 | David Brooks, Vivek Tiwari, Margaret Martonosi: Wattch: a framework for architectural-level power analysis and optimizations. ISCA 2000: 83-94 | |
| 6 | David Brooks, Margaret Martonosi, John-David Wellman, Pradip Bose: Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor. PACS 2000: 126-136 | |
| 5 | Alper Buyuktosunoglu, Stanley Schuster, David Brooks, Pradip Bose, Peter W. Cook, David H. Albonesi: An Adaptive Issue Queue for Reduced Power at High Performance. PACS 2000: 25-39 | |
| 4 | David Brooks, Margaret Martonosi: Value-based clock gating and operation packing: dynamic strategies for improving processor power and performance. ACM Trans. Comput. Syst. 18(2): 89-126 (2000) | |
| 3 | David Brooks, Pradip Bose, Stanley Schuster, Hans M. Jacobson, Prabhakar Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor V. Zyuban, Manish Gupta, Peter W. Cook: Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. IEEE Micro 20(6): 26-44 (2000) | |
| 1999 | ||
| 2 | David Brooks, Margaret Martonosi: Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware. CANPC 1999: 181-195 | |
| 1 | David Brooks, Margaret Martonosi: Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance. HPCA 1999: 13-22 | |
Colors in the list of coauthors
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