Luciano Briozzo

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1998

3 Cesare Alippi, Luciano Briozzo: Accuracy vs. Precision in Digital VLSI Architectures for Signal Processing. IEEE Trans. Computers 47(4): 472-477 (1998)

1994

2 Maurizio Valle, Daniele D. Caviglia, Marco Cornero, Giovanni Nateri, Luciano Briozzo: A VHDL-based design methodology: the design experience of a high performance ASIC chip. EURO-DAC 1994: 664-669

1 Cesare Alippi, Luciano Briozzo: Setting and Validating Precision Requirements in the Digital VLSI Implementation of a Neural Defect-Identifier for Machined Objects. ISCAS 1994: 491-494

	1998
3		Cesare Alippi, Luciano Briozzo: Accuracy vs. Precision in Digital VLSI Architectures for Signal Processing. IEEE Trans. Computers 47(4): 472-477 (1998)
	1994
2		Maurizio Valle, Daniele D. Caviglia, Marco Cornero, Giovanni Nateri, Luciano Briozzo: A VHDL-based design methodology: the design experience of a high performance ASIC chip. EURO-DAC 1994: 664-669
1		Cesare Alippi, Luciano Briozzo: Setting and Validating Precision Requirements in the Digital VLSI Implementation of a Neural Defect-Identifier for Machined Objects. ISCAS 1994: 491-494

Coauthor Index

1 Cesare Alippi [1] [3]

2 Daniele D. Caviglia [2]

3 Marco Cornero [2]

4 Giovanni Nateri [2]

5 Maurizio Valle [2]

Colors in the list of coauthors

Last update Sun May 27 04:04:01 2012 CET by the DBLP Team —

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1	Cesare Alippi	[1] [3]
2	Daniele D. Caviglia	[2]
3	Marco Cornero	[2]
4	Giovanni Nateri	[2]
5	Maurizio Valle	[2]