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| 2012 | ||
|---|---|---|
| 56 | Stefan Stattelmann, Gernot Gebhard, Christoph Cullmann, Oliver Bringmann, Wolfgang Rosenstiel: Hybrid source-level simulation of data caches using abstract cache models. DATE 2012: 376-381 | |
| 55 | Kosmas Knoedler, Jochen Steinmann, Sylvain Laversanne, Stephen Jones, Arno Huss, Emre Kural, David Sanchez, Oliver Bringmann, Jochen Zimmermann: Optimal energy management and recovery for FEV. DATE 2012: 683-684 | |
| 54 | Jochen Zimmermann, Oliver Bringmann, Wolfgang Rosenstiel: Analysis of multi-domain scenarios for optimized dynamic power management strategies. DATE 2012: 862-865 | |
| 53 | Dennis Nienhüser, Tobias Bär, Ralf Kohlhaas, Thomas Schamm, Jochen Zimmermann, Thomas Gumpp, Marcus Strand, Oliver Bringmann, Johann Marius Zöllner: Energy Efficient Driving and Operation Strategies Based on Situation Awareness and Reasoning. it - Information Technology 54(1): 5-16 (2012) | |
| 2011 | ||
| 52 | Stefan Stattelmann, Oliver Bringmann, Wolfgang Rosenstiel: Dominator homomorphism based code matching for source-level simulation of embedded software. CODES+ISSS 2011: 305-314 | |
| 51 | Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich: Design and architectures for dependable embedded systems. CODES+ISSS 2011: 69-78 | |
| 50 | Stefan Stattelmann, Oliver Bringmann, Wolfgang Rosenstiel: Fast and accurate source-level simulation of software timing considering complex code optimizations. DAC 2011: 486-491 | |
| 49 | Allan Crone, Oliver Bringmann, C. Chevallaz, B. Dickman, Volkan Esen, M. Rohleder: State of the art verification methodologies in 2015. DATE 2011: 1339 | |
| 48 | Stefan Stattelmann, Oliver Bringmann, Wolfgang Rosenstiel: Fast and accurate resource conflict simulation for performance analysis of multi-core systems. DATE 2011: 210-215 | |
| 47 | Andreas Bernauer, Gunnar Arndt, Oliver Bringmann, Wolfgang Rosenstiel: Autonomous multi-processor-SoC optimization with distributed learning classifier systems XCS. ICAC 2011: 213-216 | |
| 46 | Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel: Combining Software and Hardware LCS for Lightweight On-chip Learning. Organic Computing 2011: 253-265 | |
| 45 | Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf: Autonomic System on Chip Platform. Organic Computing 2011: 413-425 | |
| 44 | Johannes Zeppenfeld, Abdelmajid Bouajila, Walter Stechele, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Andreas Herkersdorf: Applying ASoC to Multi-core Applications for Workload Management. Organic Computing 2011: 461-472 | |
| 2010 | ||
| 43 | Matthias Müller, Axel G. Braun, Joachim Gerlach, Wolfgang Rosenstiel, Dennis Nienhüser, Johann Marius Zöllner, Oliver Bringmann: Design of an automotive traffic sign recognition system targeting a multi-core SoC implementation. DATE 2010: 532-537 | |
| 42 | Andreas Braun, Oliver Bringmann, Djones Lettnin, Wolfgang Rosenstiel: Simulation-based verification of the MOST NetInterface specification revision 3.0. DATE 2010: 538-543 | |
| 41 | Andreas Bernauer, Johannes Zeppenfeld, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel: Combining Software and Hardware LCS for Lightweight On-Chip Learning. DIPES/BICC 2010: 278-289 | |
| 40 | Stefan Stattelmann, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel: Reconstructing Line References from Optimized Binary Code for Source-Level Annotation. FDL 2010: 62-67 | |
| 39 | Barbara Rakitsch, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel: Pruning population size in XCS for complex problems. IJCNN 2010: 1-8 | |
| 2009 | ||
| 38 | Björn Sander, Jürgen Schnerr, Oliver Bringmann: ESL power analysis of embedded processors for temperature and reliability estimations. CODES+ISSS 2009: 239-248 | |
| 37 | Alexander Viehl, Michael Pressler, Oliver Bringmann: Bottom-up performance analysis considering time slice based software scheduling at system level. CODES+ISSS 2009: 423-432 | |
| 36 | Alexander Viehl, Michael Pressler, Oliver Bringmann, Wolfgang Rosenstiel: White box performance analysis considering static non-preemptive software scheduling. DATE 2009: 513-518 | |
| 35 | Timo Schönwald, Jochen Zimmermann, Oliver Bringmann, Wolfgang Rosenstiel: Network-on-Chip Architecture Exploration Framework. DSD 2009: 375-382 | |
| 34 | Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel: Generic Self-Adaptation to Reduce Design Effort for System-on-Chip. SASO 2009: 126-135 | |
| 2008 | ||
| 33 | Matthias Krause, Dominik Englert, Oliver Bringmann, Wolfgang Rosenstiel: Combination of instruction set simulation and abstract RTOS model execution for fast and accurate target software evaluation. CODES+ISSS 2008: 143-148 | |
| 32 | Jürgen Schnerr, Oliver Bringmann, Alexander Viehl, Wolfgang Rosenstiel: High-performance timing simulation of embedded software. DAC 2008: 290-295 | |
| 31 | Alexander Viehl, Björn Sander, Oliver Bringmann, Wolfgang Rosenstiel: Integrated Requirement Evaluation of Non-Functional System-on-Chip Properties. FDL 2008: 105-110 | |
| 30 | Jochen Zimmermann, Oliver Bringmann, Joachim Gerlach, Florian Schaefer, Ulrich Nageldinger: Comprehensive Platform and Component Modeling of Heterogeneous Interconnected Systems (invited). FDL 2008: 227-232 | |
| 2007 | ||
| 29 | Axel Siebenborn, Alexander Viehl, Oliver Bringmann, Wolfgang Rosenstiel: Control-Flow Aware Communication and Conflict Analysis of Parallel Processes. ASP-DAC 2007: 32-37 | |
| 28 | Alexander Viehl, Markus Schwarz, Oliver Bringmann, Wolfgang Rosenstiel: Probabilistic performance risk analysis at system-level. CODES+ISSS 2007: 185-190 | |
| 27 | Matthias Krause, Oliver Bringmann, André Hergenhan, Gökhan Tabanoglu, Wolfgang Rosenstiel: Timing simulation of interconnected AUTOSAR software-components. DATE 2007: 474-479 | |
| 26 | Timo Schönwald, Jochen Zimmermann, Oliver Bringmann, Wolfgang Rosenstiel: Fully Adaptive Fault-Tolerant Routing Algorithm for Network-on-Chip Architectures. DSD 2007: 527-534 | |
| 25 | Alexander Viehl, Markus Schwarz, Oliver Bringmann, Wolfgang Rosenstiel: A Hybrid Approach for System-Level Design Evaluation. IESS 2007: 165-178 | |
| 24 | Jürgen Schnerr, Oliver Bringmann, Wolfgang Rosenstiel: Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs CoRR abs/0710.4644: (2007) | |
| 2006 | ||
| 23 | Abdelmajid Bouajila, Andreas Bernauer, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoCs. BICC 2006: 107-113 | |
| 22 | Wolfgang Klingauf, Robert Günzel, Oliver Bringmann, Pavel Parfuntseu, Mark Burton: GreenBus: a generic interconnect fabric for transaction level modelling. DAC 2006: 905-910 | |
| 21 | Alexander Viehl, Timo Schönwald, Oliver Bringmann, Wolfgang Rosenstiel: Formal performance analysis and simulation of UML/SysML models for ESL design. DATE 2006: 242-247 | |
| 20 | Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel, Abdelmajid Bouajila, Walter Stechele, Andreas Herkersdorf: An Architecture for Runtime Evaluation of SoC Reliability. GI Jahrestagung (1) 2006: 177- | |
| 19 | Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Andreas Bernauer, Oliver Bringmann, Wolfgang Rosenstiel: Organic Computing at the System on Chip Level. VLSI-SoC 2006: 338-341 | |
| 2005 | ||
| 18 | Gabriel Mihai Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Towards a Framework and a Design Methodology for Autonomous SoC. ARCS Workshops 2005: 101-108 | |
| 17 | Oliver Bringmann, Wolfgang Rosenstiel, Axel Siebenborn: Conflict analysis in multiprocess synthesis for optimized system integration. CODES+ISSS 2005: 15-20 | |
| 16 | Jürgen Schnerr, Oliver Bringmann, Wolfgang Rosenstiel: Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs. DATE 2005: 792-797 | |
| 15 | Axel G. Braun, Joachim Gerlach, Wolfgang Rosenstiel, Axel Siebenborn, Oliver Bringmann: SystemC-Based Communication and Performance Analysis. FDL 2005: 33-48 | |
| 14 | Gabriel Mihai Lipsa, Andreas Herkersdorf, Wolfgang Rosenstiel, Oliver Bringmann, Walter Stechele: Towards a Framework and a Design Methodology for Autonomic SoC. ICAC 2005: 391-392 | |
| 13 | Matthias Krause, Oliver Bringmann, Wolfgang Rosenstiel: Target software generation: an approach for automatic mapping of SystemC specifications onto real-time operating systems. Design Autom. for Emb. Sys. 10(4): 229-251 (2005) | |
| 2004 | ||
| 12 | Axel Siebenborn, Oliver Bringmann, Wolfgang Rosenstiel: Communication Analysis for System-On-Chip Design. DATE 2004: 648-655 | |
| 11 | Axel Siebenborn, Oliver Bringmann, Wolfgang Rosenstiel: Communication Analysis for Network-on-Chip Design. PARELEC 2004: 315-320 | |
| 2002 | ||
| 10 | Axel Siebenborn, Oliver Bringmann, Wolfgang Rosenstiel: Worst-case performance analysis of parallel, communicating software processes. CODES 2002: 37-42 | |
| 9 | Oliver Bringmann, Wolfgang Rosenstiel, Carsten Menn: Controller Estimation for FPGA Target Architectures during High-Level Synthesis. ISSS 2002: 56-61 | |
| 2000 | ||
| 8 | Oliver Bringmann, Wolfgang Rosenstiel, Carsten Menn: Target Architecture Oriented High-Level Synthesis for Multi-FPGA Based Emulation. DATE 2000: 326-332 | |
| 7 | Oliver Bringmann, Wolfgang Rosenstiel: Hierarchische Synthese für anwendungsspezifische Prototypenimplementierungen (Hierarchical Synthesis for Application-Specific Prototyping Implementations). it+ti - Informationstechnik und Technische Informatik 42(2): 34-39 (2000) | |
| 1999 | ||
| 6 | Oliver Bringmann, Wolfgang Rosenstiel: Hierarchische Synthese für die Emulation von integrierten Steuerungssystemen. GI Jahrestagung 1999: 146-153 | |
| 5 | Oliver Bringmann, Wolfgang Rosenstiel, Annette Muth, Georg Färber, Frank Slomka, Richard Hofmann: Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping. IEEE International Workshop on Rapid System Prototyping 1999: 114-119 | |
| 1998 | ||
| 4 | Oliver Bringmann, Wolfgang Rosenstiel: Cross-Level Hierarchical High-Level Synthesis. DATE 1998: 451-456 | |
| 3 | Oliver Bringmann, Wolfgang Rosenstiel, Dirk Reichardt: Synchronization Detection for Multi-Process Hierarchical Synthesis. ISSS 1998: 105-110 | |
| 1997 | ||
| 2 | Oliver Bringmann, Wolfgang Rosenstiel: Resource sharing in hierarchical synthesis. ICCAD 1997: 318-325 | |
| 1995 | ||
| 1 | Ulrich Weinmann, Oliver Bringmann, Wolfgang Rosenstiel: Device selection for system partitioning. EURO-DAC 1995: 2-7 | |
Colors in the list of coauthors
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