 | 2010 |
|---|
| 9 |       | Marcel Siadjine Njinowa,
Hung Tien Bui,
François R. Boyer:
Peak-to-peak jitter reduction technique for the Free-Running Period Synthesizer (FRPS).
ISCAS 2010: 1312-1315 |
| 2007 |
|---|
| 8 | | Bill Pontikakis,
Hung Tien Bui,
François R. Boyer,
Yvon Savaria:
A Low-Complexity High-Speed Clock Generator for Dynamic Frequency Scaling of FPGA and Standard-Cell Based Designs.
ISCAS 2007: 633-636 |
| 2006 |
|---|
| 7 | | Bill Pontikakis,
François R. Boyer,
Yvon Savaria:
A 0.8V algorithmically defined buffer and ring oscillator low-energy design for nanometer SoCs.
ISCAS 2006 |
| 2005 |
|---|
| 6 | | H. G. Epassa,
François R. Boyer,
Yvon Savaria:
Implementation of a cycle by cycle variable speed processor.
ISCAS (4) 2005: 3335-3338 |
| 5 | | Bill Pontikakis,
François R. Boyer,
Yvon Savaria:
Performance Improvement of Configurable Processor Architectures Using a Variable Clock Period.
IWSOC 2005: 454-458 |
| 2004 |
|---|
| 4 | | James Lapalme,
El Mostapha Aboulhamid,
Gabriela Nicolescu,
Luc Charest,
François R. Boyer,
J. P. David,
Guy Bois:
.NET Framework - A Solution for the Next Generation Tools for System-Level Modeling and Simulation.
DATE 2004: 732-733 |
| 3 | | James Lapalme,
El Mostapha Aboulhamid,
Gabriela Nicolescu,
Luc Charest,
François R. Boyer,
J. P. David,
Guy Bois:
ESys.Net: a new solution for embedded systems modeling and simulation.
LCTES 2004: 107-114 |
| 2003 |
|---|
| 2 | | Jérôme Chevalier,
Mathieu Rondonneau,
Olivier Benny,
Guy Bois,
El Mostapha Aboulhamid,
François R. Boyer:
SPACE: A Hardware/Software SystemC Modeling Platform Including an RTOS.
FDL 2003: 704-716 |
| 2001 |
|---|
| 1 | | François R. Boyer,
El Mostapha Aboulhamid,
Yvon Savaria,
Michel Boyer:
Optimal design of synchronous circuits using software pipelining techniques.
ACM Trans. Design Autom. Electr. Syst. 6(4): 516-532 (2001) |
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