 | 2011 |
| 19 |  | Gilberto Ochoa,
El-Bay Bourennane,
Hassan Rabah,
Ouassila Labbani:
High-level modelling and automatic generation of dynamicaly reconfigurable systems.
DASIP 2011: 332-339 |
| 18 |  | Gilberto Ochoa,
El-Bay Bourennane,
Ouassila Labbani,
Kamel Messaoudi:
IP-XACT and marte based approach for partially reconfigurable systems-on-chip.
FDL 2011: 1-8 |
| 2010 |
| 17 |  | Elhillali Kerkouche,
Allaoua Chaoui,
El-Bay Bourennane,
Ouassila Labbani:
On the Use of Graph Transformation in the Modeling and Verification of Dynamic Behavior in UML Models.
JSW 5(11): 1279-1291 (2010) |
| 16 |  | Elhillali Kerkouche,
Allaoua Chaoui,
El-Bay Bourennane,
Ouassila Labbani:
A UML and Colored Petri Nets Integrated Modeling and Analysis Approach using Graph Transformation.
Journal of Object Technology 9(4): 25-43 (2010) |
| 2009 |
| 15 |  | Elhillali Kerkouche,
Allaoua Chaoui,
El-Bay Bourennane,
Ouassila Labbani:
Modeling and Verification of Dynamic Behavior in UML Models: A Graph Transformation Approach.
SEDE 2009: 111-118 |
| 2008 |
| 14 |  | Sami Boukhechem,
El-Bay Bourennane:
SystemC Transaction-Level Modeling of an MPSoC Platform Based on an Open Source ISS by Using Interprocess Communication.
Int. J. Reconfig. Comp. 2008: (2008) |
| 2007 |
| 13 |  | AbdelHalim Samahi,
El-Bay Bourennane:
Automated Integration and Communication Synthesis of Reconfigurable MPSoC Platform.
AHS 2007: 379-385 |
| 2005 |
| 12 |  | AbdelHalim Samahi,
Sami Boukhechem,
El-Bay Bourennane,
Nasser E. Idirene:
STARSoC : A C-based platform for rapid prototyping of embedded system.
ReCoSoC 2005: 177-182 |
| 11 |  | Johel Mitéran,
Jiri Matas,
El-Bay Bourennane,
Michel Paindavoine,
Julien Dubois:
Automatic Hardware Implementation Tool for a Discrete Adaboost-Based Decision Algorithm.
EURASIP J. Adv. Sig. Proc. 2005(7): 1035-1046 (2005) |
| 2004 |
| 10 |  | Sophie Bouchoux,
El-Bay Bourennane,
Michel Paindavoine:
Implementation of JPEG2000 arithmetic decoder using dynamic reconfiguration of FPGA.
ICIP 2004: 2841-2844 |
| 9 |  | Sophie Bouchoux,
El-Bay Bourennane,
Johel Mitéran,
Michel Paindavoine:
Implementation of JPEG2000 Arithmetic Decoder on a Dynamically Reconfigurable ATMEL FPGA.
ISVLSI 2004: 237-238 |
| 2003 |
| 8 |  | Johel Mitéran,
Sebastien Bouillant,
El-Bay Bourennane:
Classification Boundary Approximation by Using Combination of Training Steps for Real-Time Image Segmentation.
MLDM 2003: 141-155 |
| 7 |  | Johel Mitéran,
Sebastien Bouillant,
El-Bay Bourennane:
SVM approximation for real-time image segmentation by using an improved hyperrectangles-based method.
Real-Time Imaging 9(3): 179-188 (2003) |
| 2002 |
| 6 |  | El-Bay Bourennane,
Claude Milan,
Michel Paindavoine,
Sophie Bouchoux:
Real Time Image Rotation Using Dynamic Reconfiguration.
Real-Time Imaging 8(4): 277-289 (2002) |
| 5 |  | El-Bay Bourennane,
Pierre Gouton,
Michel Paindavoine,
Frédéric Truchetet:
Generalization of Canny-Deriche filter for detection of noisy exponential edge.
Signal Processing 82(10): 1317-1328 (2002) |
| 2001 |
| 4 |  | El-Bay Bourennane,
Christine Bondeau,
Michel Paindavoine:
Approches région et bayésienne pour la restauration ďimages dégradées par la turbulence atmosphérique.
Annales des Télécommunications 56(9-10): 538-549 (2001) |
| 1999 |
| 3 |  | Christine Bondeau,
El-Bay Bourennane,
Michel Paindavoine:
A principal component analysis based method for the Simulation of turbulence-degraded infrared image sequence.
Annales des Télécommunications 54(5-6): 324-330 (1999) |
| 1998 |
| 2 |  | Cyril Berthaud,
El-Bay Bourennane,
Michel Paindavoine,
Claude Milan:
Implementation of a Real Time Image Rotation using B-Spline Interpolation on FPGA's Board.
ICIP (3) 1998: 995-999 |
| 1 |  | Lionel Torres,
El-Bay Bourennane,
Michel Robert,
Michel Paindavoine:
A Recursive Digital Filter Implementation for Noisy and Blurred Images.
Real-Time Imaging 4(3): 181-191 (1998) |