N. Boudouani

	2001
3		Lounis Kessal, R. Bourguiba, Didier Demigny, N. Boudouani, Si Mahmoud Karabernou: Reconfigurable Architecture Using High Speed FPGA. VLSI-SOC 2001: 75-86
	2000
2		Didier Demigny, Lounis Kessal, R. Bourguiba, N. Boudouani: How to Use High Speed Reconfigurable FPGA for Real Time Image Processing? CAMP 2000: 240-
1		Lounis Kessal, Didier Demigny, N. Boudouani, R. Bourguiba: Reconfigurable Hardware for Real Time Image Processing. ICIP 2000

Coauthor Index

1	R. Bourguiba	[1] [2] [3]
2	Didier Demigny	[1] [2] [3]
3	Si Mahmoud Karabernou	[3]
4	Lounis Kessal	[1] [2] [3]

Last update Sun May 27 04:04:01 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page