 | 2008 |
|---|
| 5 |       | Kin-Joe Sham,
Shubha Bommalingaiahnapallya,
Mahmoud Reza Ahmadi,
Ramesh Harjani:
A 3, times, 5-Gb/s Multilane Low-Power 0.18-muhbox m CMOS Pseudorandom Bit Sequence Generator.
IEEE Trans. on Circuits and Systems 55-II(5): 432-436 (2008) |
| 2007 |
|---|
| 4 | | Shubha Bommalingaiahnapallya,
Kin-Joe Sham,
Mahmoud Reza Ahmadi,
Ramesh Harjani:
High-Speed Circuits for a Multi-Lane 12 Gbps CMOS PRBS Generator.
ISCAS 2007: 3896-3899 |
| 2005 |
|---|
| 3 | | Byunghoo Jung,
Shubha Bommalingaiahnapallya,
Ramesh Harjani:
Power optimized LC VCO and mixer co-design.
ISCAS (5) 2005: 4393-4396 |
| 2 | | Shubha Bommalingaiahnapallya,
Ramesh Harjani:
Process tolerant design of N-tone Sigma-Delta converters.
ISCAS (5) 2005: 4630-4633 |
| 2004 |
|---|
| 1 | | Shubha Bommalingaiahnapallya,
Ramesh Harjani:
Low power implementation of an n-tone Sigma Delta converter.
ISCAS (1) 2004: 461-464 |
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