 | 2011 |
|---|
| 7 |       | Ayan Mandal,
Nikhil Jayakumar,
Kalyana C. Bollapalli,
Sunil P. Khatri,
Rabi N. Mahapatra:
An Automated Approach for Minimum Jitter Buffered H-Tree Construction.
VLSI Design 2011: 76-81 |
| 2010 |
|---|
| 6 | | Kalyana C. Bollapalli,
Sunil P. Khatri,
Laszlo B. Kish:
Implementing digital logic with sinusoidal supplies.
DATE 2010: 315-318 |
| 2009 |
|---|
| 5 | | Kalyana C. Bollapalli,
Rajesh Garg,
Kanupriya Gulati,
Sunil P. Khatri:
Low power and high performance sram design using bank-based selective forward body bias.
ACM Great Lakes Symposium on VLSI 2009: 441-444 |
| 4 | | Kalyana C. Bollapalli,
Rajesh Garg,
Kanupriya Gulati,
Sunil P. Khatri:
On-chip bidirectional wiring for heavily pipelined systems using network coding.
ICCD 2009: 131-136 |
| 3 | | Vinay Karkala,
Kalyana C. Bollapalli,
Rajesh Garg,
Sunil P. Khatri:
A PLL design based on a standing wave resonant oscillator.
ICCD 2009: 511-516 |
| 2 | | Rajesh Kumar,
Kalyana C. Bollapalli,
Rajesh Garg,
Tarun Soni,
Sunil P. Khatri:
A robust pulsed flip-flop and its use in enhanced scan design.
ICCD 2009: 97-102 |
| 1 | | Kalyana C. Bollapalli,
Rajesh Garg,
Kanupriya Gulati,
Sunil P. Khatri:
Selective Forward Body Bias for High Speed and Low Power SRAMs.
J. Low Power Electronics 5(2): 185-195 (2009) |
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