Mounir Bohsali

	2010
4		Xiang Gao, Eric A. M. Klumperink, Gerard Socci, Mounir Bohsali, Bram Nauta: Spur-reduction techniques for PLLs using sub-sampling phase detection. ISSCC 2010: 474-475
3		Xiang Gao, Eric A. M. Klumperink, Gerard Socci, Mounir Bohsali, Bram Nauta: Spur Reduction Techniques for Phase-Locked Loops Exploiting A Sub-Sampling Phase Detector. J. Solid-State Circuits 45(9): 1809-1821 (2010)
	2009
2		Xiang Gao, Eric A. M. Klumperink, Mounir Bohsali, Bram Nauta: A 2.2GHz 7.6mW sub-sampling PLL with -126dBc/Hz in-band phase noise and 0.15psrms jitter in 0.18µm CMOS. ISSCC 2009: 392-393
1		Ali M. Niknejad, Ehsan Adabi, Babak Heydari, Mounir Bohsali, Bagher Afshar, Debopriyo Chowdhury, Patrick Reynaert: Device, Circuit, and System Considerations for 60 GHz CMOS. IEICE Transactions 92-A(2): 350-359 (2009)

Coauthor Index

1	Ehsan Adabi	[1]
2	Bagher Afshar	[1]
3	Debopriyo Chowdhury	[1]
4	Xiang Gao	[2] [3] [4]
5	Babak Heydari	[1]
6	Eric A. M. Klumperink	[2] [3] [4]
7	Bram Nauta	[2] [3] [4]
8	Ali M. Niknejad	[1]
9	Patrick Reynaert	[1]
10	Gerard Socci	[3] [4]

Colors in the list of coauthors

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