David Boerstler

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	2006
2		Kazuhiko Miki, David Boerstler, Eskinder Hailu, Jieming Qi, Sarah Pettengill, Yuichi Goto: A new test and characterization scheme for 10+ GHz low jitter wide band PLL. ASP-DAC 2006: 856-859
	2000
1		Stephen D. Posluszny, N. Aoki, David Boerstler, P. Coulman, Sang H. Dhong, Brian K. Flachs, H. Peter Hofstee, N. Kojima, Ohsang Kwon, K. Lee, D. Meltzer, Kevin J. Nowka, J. Park, J. Peter, Joel Silberman, Osamu Takahashi, Paul Villarrubia: "Timing closure by design, " a high frequency microprocessor design methodology. DAC 2000: 712-717

Coauthor Index

Last update Sun May 27 04:04:01 2012 CET by the DBLP Team —

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1	N. Aoki	[1]
2	P. Coulman	[1]
3	Sang H. Dhong	[1]
4	Brian K. Flachs	[1]
5	Yuichi Goto	[2]
6	Eskinder Hailu	[2]
7	H. Peter Hofstee	[1]
8	N. Kojima	[1]
9	Ohsang Kwon	[1]
10	K. Lee	[1]
11	D. Meltzer	[1]
12	Kazuhiko Miki	[2]
13	Kevin J. Nowka	[1]
14	J. Park	[1]
15	J. Peter	[1]
16	Sarah Pettengill	[2]
17	Stephen D. Posluszny	[1]
18	Jieming Qi	[2]
19	Joel Silberman	[1]
20	Osamu Takahashi	[1]
21	Paul G. Villarrubia (Paul Villarrubia)	[1]