 | 1996 |
|---|
| 23 |       | Nripendra N. Biswas,
C. Srikanth,
James Jacob:
Cubical CAMP for minimization of Boolean functions.
VLSI Design 1996: 264-269 |
| 1993 |
|---|
| 22 |  | Nripendra N. Biswas:
Logic design theory.
Prentice Hall 1993: I-XIII, 1-306 |
| 1992 |
|---|
| 21 | | Sampalli Srinivas,
Nripendra N. Biswas:
Design and Analysis of a Generalized Architecture for Reconfigurable m-ary Tree Structures.
IEEE Trans. Computers 41(11): 1465-1478 (1992) |
| 1990 |
|---|
| 20 | | James Jacob,
Nripendra N. Biswas:
Further Comments on "Detection of Faults in Programmable Logic Arrays".
IEEE Trans. Computers 39(1): 155-157 (1990) |
| 19 | | Nripendra N. Biswas,
Sampalli Srinivas:
A Reconfigurable Tree Architecture with Multistage Interconnection Network.
IEEE Trans. Computers 39(12): 1481-1485 (1990) |
| 18 | | Nripendra N. Biswas:
On covering distant minterms by the camp algorithm.
IEEE Trans. on CAD of Integrated Circuits and Systems 9(7): 786-789 (1990) |
| 1989 |
|---|
| 17 | | B. Gurunath,
Nripendra N. Biswas:
An algorithm for multiple output minimization.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(9): 1007-1013 (1989) |
| 1988 |
|---|
| 16 | | K. S. Ramanatha,
Nripendra N. Biswas:
Design of Crosspoint-Irredundant PLA's Using Minimal Number of Control Inputs.
IEEE Trans. Computers 37(9): 1130-1134 (1988) |
| 1986 |
|---|
| 15 | | Nripendra N. Biswas:
Computer-Aided Minimization Procedure for Boolean Functions.
IEEE Trans. on CAD of Integrated Circuits and Systems 5(2): 303-304 (1986) |
| 1985 |
|---|
| 14 | | Prathima Agrawal,
Vishwani D. Agrawal,
Nripendra N. Biswas:
Multiple output minimization.
DAC 1985: 674-680 |
| 13 | | James Jacob,
Nripendra N. Biswas:
: A Testable PLA Design with Minimal Hardware and Test Set.
ITC 1985: 583-588 |
| 12 | | Nripendra N. Biswas:
On Bit Steering in the Minimization of the Control Memory of Microprogrammed Processors.
IEEE Trans. Computers 34(11): 1057-1061 (1985) |
| 1984 |
|---|
| 11 | | Nripendra N. Biswas:
Computer aided minimization procedure for boolean functions.
DAC 1984: 699-702 |
| 1983 |
|---|
| 10 | | K. S. Ramanatha,
Nripendra N. Biswas:
An On-Line Algorithm for the Location of Cross Point Faults in Programmable Logic Arrays.
IEEE Trans. Computers 32(5): 438-444 (1983) |
| 9 | | K. S. Ramanatha,
Nripendra N. Biswas:
A Design for Testability of Undetectable Crosspoint Faults in Programmable Logic Arrays.
IEEE Trans. Computers 32(6): 551-557 (1983) |
| 8 | | Chamarty D. V. P. Rao,
Nripendra N. Biswas:
On the Minimization of Wordwidth in the Control Memory of a Microprogrammed Digital Computer.
IEEE Trans. Computers 32(9): 863-868 (1983) |
| 1982 |
|---|
| 7 | | K. S. Ramanatha,
Nripendra N. Biswas:
A Design for Complete Testability of Programmable Logic Arrays.
ITC 1982: 67-74 |
| 1981 |
|---|
| 6 | | Ayakannu Mathialagan,
Nripendra N. Biswas:
Bit Steering in the Minimization of Control Memory in Microprogrammed Digital Computers.
IEEE Trans. Computers 30(2): 144-147 (1981) |
| 1980 |
|---|
| 5 | | Ayakannu Mathialagan,
Nripendra N. Biswas:
Optimal Interconnections in the Design of Microprocessors and Digital Systems.
IEEE Trans. Computers 29(2): 145-149 (1980) |
| 1979 |
|---|
| 4 | | Anil K. Sarje,
Nripendra N. Biswas:
A New Approach to 2-Asummability Testing.
IEEE Trans. Computers 28(10): 798-801 (1979) |
| 1977 |
|---|
| 3 | | Anil K. Sarje,
Nripendra N. Biswas:
An Algorithm for Testing 2-Asummability of Boolean Functions.
IEEE Trans. Computers 26(10): 1049-1053 (1977) |
| 1976 |
|---|
| 2 | | C. V. S. Rao,
Nripendra N. Biswas:
Further Comments on ``Closure Partition Method for Minimizing Incomplete Sequential Machines.
IEEE Trans. Computers 25(7): 767-768 (1976) |
| 1975 |
|---|
| 1 | | C. V. S. Rao,
Nripendra N. Biswas:
Minimization of Incompletely Specified Sequential Machines.
IEEE Trans. Computers 24(11): 1089-1100 (1975) |
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