J. Biesenack

	1994
4		Norbert Wehn, J. Biesenack, Peter Duzy, T. Langmaier, Michael Münch, Michael Pilsl, S. Rumler: Scheduling of behavioral VHDL by retiming techniques. EURO-DAC 1994: 546-551
	1993
3		J. Biesenack, M. Koster, A. Langmaier, S. Ledeux, S. Marz, Michael Payer, Michael Pilsl, S. Rumler, H. Soukup, Norbert Wehn, Peter Duzy: The Siemens high-level synthesis system CALLAS. IEEE Trans. VLSI Syst. 1(3): 244-253 (1993)
	1992
2		J. Biesenack, Norbert Wehn, A. Stoll, Michael Payer: Data Part Optimizations in the CALLAS Synthesis Environment. Synthesis for Control Dominated Circuits 1992: 263-274
	1991
1		Norbert Wehn, J. Biesenack, Michael Pilsl: A New Approach to Multiplexer Minimisation in the CALLAS Synthesis Environment. VLSI 1991: 203-213

Coauthor Index

1	Peter Duzy	[3] [4]
2	M. Koster	[3]
3	A. Langmaier	[3]
4	T. Langmaier	[4]
5	S. Ledeux	[3]
6	S. Marz	[3]
7	Michael Münch	[4]
8	Michael Payer	[2] [3]
9	Michael Pilsl	[1] [3] [4]
10	S. Rumler	[3] [4]
11	H. Soukup	[3]
12	A. Stoll	[2]
13	Norbert Wehn	[1] [2] [3] [4]

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