Szymon Bieganski

	2008
5		Lech Józwiak, Szymon Bieganski: Technology Library Modelling for Information-driven Circuit Synthesis. DSD 2008: 480-489
	2005
4		Lech Józwiak, Szymon Bieganski: High-quality Sub-function Construction in the Information-driven Circuit Synthesis with Gates. DSD 2005: 450-459
3		Lech Józwiak, Szymon Bieganski, Artur Chojnacki: Information-driven circuit synthesis with the pre-characterized gate libraries. Journal of Systems Architecture 51(6-7): 405-423 (2005)
	2004
2		Lech Józwiak, Szymon Bieganski: Information Trans-Coders in Information-Driven Circuit Synthesis. DSD 2004: 288-397
	2003
1		Lech Józwiak, Szymon Bieganski, Artur Chojnacki: Information-driven Library-based Circuit Synthesis. DSD 2003: 148-157

Coauthor Index

1	Artur Chojnacki	[1] [3]
2	Lech Józwiak	[1] [2] [3] [4] [5]

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