 | 2011 |
| 20 |  | Uli Kretzschmar,
Armando Astarloa,
Jesús Lázaro,
Unai Bidarte,
Jaime Jimenez:
Robustness Analysis of Different AES Implementations on SRAM Based FPGAs.
ReConFig 2011: 255-260 |
| 19 |  | Jesús Lázaro,
Armando Astarloa,
Aitzol Zuloaga,
Unai Bidarte,
Jaime Jimenez:
I2CSec: A secure serial Chip-to-Chip communication protocol.
Journal of Systems Architecture - Embedded Systems Design 57(2): 206-213 (2011) |
| 2010 |
| 18 |  | Armando Astarloa,
Jesús Lázaro,
Unai Bidarte,
Aitzol Zuloaga,
José Luis Martín:
An Autonomous Fault Tolerant System for CAN Communications.
IEA/AIE (3) 2010: 281-290 |
| 17 |  | Taho Dorta,
Jaime Jimenez,
José Luis Martín,
Unai Bidarte,
Armando Astarloa:
Reconfigurable Multiprocessor Systems: A Review.
Int. J. Reconfig. Comp. 2010: (2010) |
| 2009 |
| 16 |  | Jesús Lázaro,
Armando Astarloa,
Unai Bidarte,
Jaime Jimenez,
Aitzol Zuloaga:
AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications.
ARC 2009: 312-317 |
| 15 |  | Armando Astarloa,
Jesús Lázaro,
Unai Bidarte,
Aitzol Zuloaga,
Jaime Jimenez:
DNAX-BCU: An Un-clonable Cost-conscious SoPC Implementation for Bus Coupling Units of the European Installation Bus.
ICDCS Workshops 2009: 472-475 |
| 14 |  | Taho Dorta,
Jaime Jimenez,
José Luis Martín,
Unai Bidarte,
Armando Astarloa:
Overview of FPGA-Based Multiprocessor Systems.
ReConFig 2009: 273-278 |
| 13 |  | Armando Astarloa,
Jesús Lázaro,
Unai Bidarte,
Aitzol Zuloaga,
Jaime Jimenez:
PCIREX: A Fast Prototyping Platform for TMR Dynamically Reconfigurable Systems.
ReConFig 2009: 54-58 |
| 2008 |
| 12 |  | Armando Astarloa,
Unai Bidarte,
Jaime Jimenez,
Jesús Lázaro,
Iñigo Martínez de Alegría:
Secure Ethernet Point-to-Point Links for Autonomous Electronic Ballot Boxes.
ATC 2008: 603-614 |
| 11 |  | Armando Astarloa,
Unai Bidarte,
Jesús Lázaro,
Jon Andreu,
José Luis Martín:
Configurable-System-on-Programmable-Chip for Power Electronics Control Applications.
ReConFig 2008: 169-174 |
| 2007 |
| 10 |  | Armando Astarloa,
Aitzol Zuloaga,
Unai Bidarte,
José Luis Martín,
Jesús Lázaro,
Jaime Jimenez:
Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs.
Journal of Systems Architecture 53(9): 629-643 (2007) |
| 9 |  | Jesús Lázaro,
Jagoba Arias,
Armando Astarloa,
Unai Bidarte,
Aitzol Zuloaga:
Hardware architecture for a general regression neural network coprocessor.
Neurocomputing 71(1-3): 78-87 (2007) |
| 2006 |
| 8 |  | Jaime Jimenez,
José Luis Martín,
Aitzol Zuloaga,
Unai Bidarte,
Jagoba Arias:
Comparison of two designs for the multifunction vehicle bus.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(5): 797-805 (2006) |
| 2005 |
| 7 |  | José L. Martín-Sánchez,
Aitzol Zuloaga,
Carlos Cuadrado,
Jesús Lázaro,
Unai Bidarte:
Hardware implementation of optical flow constraint equation using FPGAs.
Computer Vision and Image Understanding 98(3): 462-490 (2005) |
| 6 |  | Armando Astarloa,
Unai Bidarte,
Jesús Lázaro,
Aitzol Zuloaga,
Jagoba Arias:
Multiprocessor SoPC-Core for FAT volume computation.
Microprocessors and Microsystems 29(10): 421-434 (2005) |
| 2004 |
| 5 |  | Armando Astarloa,
Jesús Lázaro,
Unai Bidarte,
José Luis Martín,
Aitzol Zuloaga:
A Self-Reconfiguration Framework for Multiprocessor CSoPCs.
FPL 2004: 1124-1126 |
| 4 |  | Unai Bidarte,
Armando Astarloa,
José Luis Martín,
Jon Andreu:
Simulation Platform for Architectural Verification and Performance Analysis in Core-Based SoC Design.
FPL 2004: 965-969 |
| 3 |  | Jesús Lázaro,
Armando Astarloa,
Jagoba Arias,
Unai Bidarte,
Carlos Cuadrado:
High Throughput Serpent Encryption Implementation.
FPL 2004: 996-1000 |
| 2 |  | Armando Astarloa,
Jesús Lázaro,
Jagoba Arias,
Unai Bidarte,
Aitzol Zuloaga:
Co-simulation Virtual Platform for Reconfigurable Multiprocessor Hybrid Cores Development.
MSV/AMCS 2004: 17-22 |
| 2003 |
| 1 |  | Unai Bidarte,
Armando Astarloa,
Aitzol Zuloaga,
Jaime Jimenez,
Iñigo Martínez de Alegría:
Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements.
FPL 2003: 497-506 |