Azeez J. Bhavnagarwala

	2003
6		Stephen V. Kosonocky, Azeez J. Bhavnagarwala, Kenneth Chin, George Gristede, Anne-Marie Haen, Wei Hwang, Mark B. Ketchen, Suhwan Kim, Daniel R. Knebel, Kevin W. Warren, Victor V. Zyuban: Low-power circuits and technology for wireless digital systems. IBM Journal of Research and Development 47(2-3): 283-298 (2003)
	2001
5		Azeez J. Bhavnagarwala, Stephen V. Kosonocky, James D. Meindl: Interconnect-centric Array Architectures for Minimum SRAM Access Time. ICCD 2001: 400-405
	2000
4		Azeez J. Bhavnagarwala, Blanca Austin, Ashok Kapoor, James D. Meindl: CMOS system-on-a-chip voltage scaling beyond 50nm. ACM Great Lakes Symposium on VLSI 2000: 7-12
3		Azeez J. Bhavnagarwala, Blanca Austin, Keith A. Bowman, James D. Meindl: A minimum total power methodology for projecting limits on CMOS GSI. IEEE Trans. VLSI Syst. 8(3): 235-251 (2000)
	1998
2		Azeez J. Bhavnagarwala, Blanca Austin, James D. Meindl: Minimum supply voltage for bulk Si CMOS GSI. ISLPED 1998: 100-102
	1996
1		Azeez J. Bhavnagarwala, Vivek De, Blanca Austin, James D. Meindl: Circuit techniques for low-power CMOS GSI. ISLPED 1996: 193-196

Coauthor Index

1	Blanca Austin	[1] [2] [3] [4]
2	Keith A. Bowman	[3]
3	Kenneth Chin	[6]
4	Vivek De (Vivek K. De)	[1]
5	George Gristede	[6]
6	Anne-Marie Haen	[6]
7	Wei Hwang	[6]
8	Ashok Kapoor	[4]
9	Mark B. Ketchen	[6]
10	Suhwan Kim	[6]
11	Daniel R. Knebel	[6]
12	Stephen V. Kosonocky	[5] [6]
13	James D. Meindl	[1] [2] [3] [4] [5]
14	Kevin W. Warren	[6]
15	Victor V. Zyuban	[6]

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