Taha Beyrouthy

	2011
6		Taha Beyrouthy, Laurent Fesquet: An event-driven FIR filter: Design and implementation. International Symposium on Rapid System Prototyping 2011: 59-65
5		Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin: A Secure Asynchronous FPGA Architecture, Experimental Results and Some Debug Feedback CoRR abs/1103.1360: (2011)
	2009
4		Sylvain Guilley, Sumanta Chaudhuri, Laurent Sauvage, Jean-Luc Danger, Taha Beyrouthy, Laurent Fesquet: Updates on the potential of clock-less logics to strengthen cryptographic circuits against side-channel attacks. ICECS 2009: 351-354
	2008
3		Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin: Physical Design of FPGA Interconnect to Prevent Information Leakage. ARC 2008: 87-98
2		Philippe Hoogvorst, Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Danger, Taha Beyrouthy, Laurent Fesquet: A Reconfigurable Programmable Logic Block for a Multi-Style Asynchronous FPGA resistant to Side-Channel Attacks CoRR abs/0809.3942: (2008)
	2007
1		Philippe Hoogvorst, Sylvain Guilley, Sumanta Chaudhuri, Alin Razafindraibe, Taha Beyrouthy, Laurent Fesquet: A Reconfigurable Cell for a Multi-Style Asynchronous FPGA. ReCoSoC 2007: 15-22

Coauthor Index

1	Sumanta Chaudhuri	[1] [2] [3] [4] [5]
2	Jean-Luc Danger	[2] [3] [4] [5]
3	Laurent Fesquet	[1] [2] [3] [4] [5] [6]
4	Sylvain Guilley	[1] [2] [3] [4] [5]
5	Philippe Hoogvorst	[1] [2] [3] [5]
6	Alin Razafindraibe	[1] [3] [5]
7	Marc Renaudin	[3] [5]
8	Laurent Sauvage	[4]

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