 | 2010 |
| 6 |  | Ulrich Kühne,
Sven Beyer,
Jörg Bormann,
John Barstow:
Automated formal verification of processors based on architectural models.
FMCAD 2010: 129-136 |
| 2009 |
| 5 |  | Ulrich Kühne,
Sven Beyer,
Christian Pichler:
Generating an Efficient Instruction Set Simulator from a Complete Property Suite.
IEEE International Workshop on Rapid System Prototyping 2009: 109-115 |
| 2007 |
| 4 |  | Sven Beyer:
Putting it all together: formal verification of the VAMP.
Saarland University 2007: 1-185 |
| 2006 |
| 3 |  | Sven Beyer,
Christian Jacobi,
Daniel Kröning,
Dirk Leinenbach,
Wolfgang J. Paul:
Putting it all together - Formal verification of the VAMP.
STTT 8(4-5): 411-430 (2006) |
| 2005 |
| 2 |  | Sven Beyer,
Peter Böhm,
Michael Gerke,
Mark A. Hillebrand,
Thomas In der Rieden,
Steffen Knapp,
Dirk Leinenbach,
Wolfgang J. Paul:
Towards the Formal Verification of Lower System Layers in Automotive Systems.
ICCD 2005: 317-326 |
| 2003 |
| 1 |  | Sven Beyer,
Christian Jacobi,
Daniel Kroening,
Dirk Leinenbach,
Wolfgang J. Paul:
Instantiating Uninterpreted Functional Units and Memory System: Functional Verification of the VAMP.
CHARME 2003: 51-65 |