 | 2011 |
| 8 |  | Ulrich Ramacher,
Wolfgang Raab,
J. A. Ulrich Hachmann,
Dominik Langen,
Jörg Berthold,
R. Kramer,
A. Schackow,
Cyprian Grassmann,
Mirko Sauermann,
P. Szreder,
F. Capar,
G. Obradovic,
W. Xu,
Nico Brüls,
Kang Lee,
Eugene Weber,
Ray Kuhn,
John Harrington:
Architecture and implementation of a Software-Defined Radio baseband processor.
ISCAS 2011: 2193-2196 |
| 2010 |
| 7 |  | Wolfgang Raab,
Jörg Berthold,
J. A. Ulrich Hachmann,
Dominik Langen,
Michael Schreiner,
Holger Eisenreich,
Jens-Uwe Schluessler,
Georg Ellguth:
Low power design of the X-GOLD® SDR 20 baseband processor.
DATE 2010: 792-793 |
| 2004 |
| 6 |  | Stephan Henzler,
Georg Georgakos,
Jörg Berthold,
Doris Schmitt-Landsiedel:
Single Supply Voltage High-Speed Semi-dynamic Level-Converting Flip-Flop with Low Power and Area Consumption.
PATMOS 2004: 392-401 |
| 5 |  | Stephan Henzler,
Georg Georgakos,
Jörg Berthold,
Doris Schmitt-Landsiedel:
Two Level Compact Simulation Methodology for Timing Analysis of Power-Switched Circuits.
PATMOS 2004: 789-798 |
| 2003 |
| 4 |  | Tim Schoenauer,
Jörg Berthold,
Christoph Heer:
Reduced Leverage of Dual Supply voltages in Ultra Deep Submicron Technologies.
PATMOS 2003: 41-50 |
| 3 |  | Stephan Henzler,
Markus Koban,
Doris Schmitt-Landsiedel,
Jörg Berthold,
Georg Georgakos:
Design Aspects and Technological Scaling Limits of ZigZag Circuit Block Switch-Off Schemes.
VLSI-SOC 2003: 246-251 |
| 1997 |
| 2 |  | M. Eisele,
Jörg Berthold,
Doris Schmitt-Landsiedel,
R. Mahnkopf:
The impact of intra-die device parameter variations on path delays and on the design for yield of low voltage digital circuits.
IEEE Trans. VLSI Syst. 5(4): 360-368 (1997) |
| 1996 |
| 1 |  | M. Eisele,
Jörg Berthold,
Doris Schmitt-Landsiedel,
R. Mahnkopf:
The impact of intra-die device parameter variations on path delays and on the design for yield of low voltage digital circuits.
ISLPED 1996: 237-242 |