Valeria Bertacco

	2012
87		Andrea Pellegrini, Robert Smolinski, Lei Chen, Xin Fu, Siva Kumar Sastry Hari, Junhao Jiang, Sarita V. Adve, Todd M. Austin, Valeria Bertacco: CrashTest'ing SWAT: Accurate, gate-level evaluation of symptom-based resiliency solutions. DATE 2012: 1106-1109
86		Biruk Mammo, Debapriya Chatterjee, Dmitry Pidan, Amir Nahir, Avi Ziv, Ronny Morad, Valeria Bertacco: Approximating checkers for simulation acceleration. DATE 2012: 153-158
85		Andrew DeOrio, David Fick, Valeria Bertacco, Dennis Sylvester, David Blaauw, Jin Hu, Gregory K. Chen: A Reliable Routing Architecture and Algorithm for NoCs. IEEE Trans. on CAD of Integrated Circuits and Systems 31(5): 726-739 (2012)
	2011
84		Joseph L. Greathouse, Chelsea LeBlanc, Todd M. Austin, Valeria Bertacco: Highly scalable distributed dataflow analysis. CGO 2011: 277-288
83		Andrew DeOrio, Konstantinos Aisopos, Valeria Bertacco, Li-Shiuan Peh: DRAIN: distributed recovery architecture for inaccessible nodes in multi-core chips. DAC 2011: 912-917
82		Mohammad Reza Kakoee, Valeria Bertacco, Luca Benini: ReliNoC: A reliable network for priority-based on-chip communication. DATE 2011: 667-672
81		Debapriya Chatterjee, Calvin McCarter, Valeria Bertacco: Simulation-based signal selection for state restoration in silicon debug. ICCAD 2011: 595-601
80		Andrew DeOrio, Daya Shanker Khudia, Valeria Bertacco: Post-silicon bug diagnosis with inconsistent executions. ICCAD 2011: 755-761
79		Rawan Abdel-Khalek, Ritesh Parikh, Andrew DeOrio, Valeria Bertacco: Functional correctness for CMP interconnects. ICCD 2011: 352-359
78		Ritesh Parikh, Valeria Bertacco: Formally enhanced runtime verification to ensure NoC functional correctness. MICRO 2011: 410-419
77		Mohammad Reza Kakoee, Valeria Bertacco, Luca Benini: A distributed and topology-agnostic approach for on-line NoC testing. NOCS 2011: 113-120
76		Konstantinos Aisopos, Andrew DeOrio, Li-Shiuan Peh, Valeria Bertacco: ARIADNE: Agnostic Reconfiguration in a Disconnected Network Environment. PACT 2011: 298-309
75		Debapriya Chatterjee, Andrew DeOrio, Valeria Bertacco: Gate-Level Simulation with GPU Computing. ACM Trans. Design Autom. Electr. Syst. 16(3): 30 (2011)
	2010
74		Valeria Bertacco: Post-silicon debugging for multi-core designs. ASP-DAC 2010: 255-258
73		Andrew DeOrio, Valeria Bertacco: Electronic design automation for social networks. DAC 2010: 621-622
72		Amir Nahir, Avi Ziv, Rajesh Galivanche, Alan J. Hu, Miron Abramovici, Albert Camilleri, Bob Bentley, Harry Foster, Valeria Bertacco, Shakti Kapoor: Bridging pre-silicon verification and post-silicon validation. DAC 2010: 94-95
71		Andrea Pellegrini, Valeria Bertacco, Todd M. Austin: Fault-based attack of RSA authentication. DATE 2010: 855-860
70		Valeria Bertacco: Verification Failures: What to Do When Things Go Wrong. Haifa Verification Conference 2010: 23
69		Andrea Pellegrini, Valeria Bertacco: Application-Aware diagnosis of runtime hardware faults. ICCAD 2010: 487-492
68		Debapriya Chatterjee, Valeria Bertacco: EQUIPE: Parallel equivalence checking with GP-GPUs. ICCD 2010: 486-493
67		Rawan Abdel-Khalek, Valeria Bertacco: SoCGuard: A runtime verification solution for the functional correctness of SoCs. VLSI-SoC 2010: 49-54
66		Kai-Hui Chang, Valeria Bertacco, Igor L. Markov, Alan Mishchenko: Logic synthesis and circuit customization using extensive external don't-cares. ACM Trans. Design Autom. Electr. Syst. 15(3): (2010)
	2009
65		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Functional Design Errors in Digital Circuits - Diagnosis, Correction and Repair Springer 2009: 3-185
64		Debapriya Chatterjee, Andrew DeOrio, Valeria Bertacco: Event-driven gate-level simulation with GP-GPUs. DAC 2009: 557-562
63		Andrew DeOrio, Valeria Bertacco: Human computing for EDA. DAC 2009: 621-622
62		Valeria Bertacco: Debugging strategies for mere mortals. DAC 2009: 635-638
61		David Fick, Andrew DeOrio, Jin Hu, Valeria Bertacco, David Blaauw, Dennis Sylvester: Vicis: a reliable network for unreliable silicon. DAC 2009: 812-817
60		Debapriya Chatterjee, Andrew DeOrio, Valeria Bertacco: GCS: High-performance gate-level simulation with GPGPUs. DATE 2009: 1332-1337
59		David Fick, Andrew DeOrio, Gregory K. Chen, Valeria Bertacco, Dennis Sylvester, David Blaauw: A highly resilient routing algorithm for fault-tolerant NoCs. DATE 2009: 21-26
58		Kai-Hui Chang, Valeria Bertacco, Igor L. Markov: Customizing IP cores for system-on-chip designs using extensive external don't-cares. DATE 2009: 582-585
57		Ilya Wagner, Valeria Bertacco: Caspar: Hardware patching for multicore processors. DATE 2009: 658-663
56		Debapriya Chatterjee, Valeria Bertacco: Activity-based refinement for abstraction-guided simulation. HLDVT 2009: 146-153
55		J. Hao, Valeria Bertacco: PowerRanger: Assessing circuit vulnerability to power attacks using SAT-based static analysis. HLDVT 2009: 54-59
54		Andrew DeOrio, Ilya Wagner, Valeria Bertacco: Dacota: Post-silicon validation of the memory subsystem in multi-core designs. HPCA 2009: 405-416
53		Kai-Hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco: Incremental Verification with Error Detection, Diagnosis, and Visualization. IEEE Design & Test of Computers 26(2): 34-43 (2009)
52		Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco: A Flexible Software-Based Framework for Online Detection of Hardware Defects. IEEE Trans. Computers 58(8): 1063-1079 (2009)
51		Andrew DeOrio, Adam Bauserman, Valeria Bertacco, Beth Isaksen: Inferno: Streamlining Verification With Inferred Semantics. IEEE Trans. on CAD of Integrated Circuits and Systems 28(5): 728-741 (2009)
	2008
50		Stephen Plaza, Igor L. Markov, Valeria Bertacco: Random Stimulus Generation using Entropy and XOR Constraints. DATE 2008: 664-669
49		Ilya Wagner, Valeria Bertacco: MCjammer: Adaptive Verification for Multi-core Designs. DATE 2008: 670-675
48		Ilya Wagner, Valeria Bertacco: Reversi: Post-silicon validation system for modern microprocessors. ICCD 2008: 307-314
47		Andrew DeOrio, Adam Bauserman, Valeria Bertacco: Post-silicon verification for cache coherence. ICCD 2008: 348-355
46		Andrea Pellegrini, Kypros Constantinides, Dan Zhang, Shobana Sudhakar, Valeria Bertacco, Todd M. Austin: CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework. ICCD 2008: 363-370
45		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Reap what you sow: spare cells for post-silicon metal fix. ISPD 2008: 103-110
44		Stephen Plaza, Igor L. Markov, Valeria Bertacco: Optimizing non-monotonic interconnect using functional simulation and logic restructuring. ISPD 2008: 95-102
43		Joseph L. Greathouse, Ilya Wagner, David A. Ramos, Gautam Bhatnagar, Todd M. Austin, Valeria Bertacco, Seth Pettie: Testudo: Heavyweight security analysis via statistical sampling. MICRO 2008: 117-128
42		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Automating Postsilicon Debugging and Repair. IEEE Computer 41(7): 47-54 (2008)
41		Todd M. Austin, Valeria Bertacco, Scott A. Mahlke, Yu Cao: Reliable Systems on Unreliable Fabrics. IEEE Design & Test of Computers 25(4): 322-332 (2008)
40		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Fixing Design Errors With Counterexamples and Resynthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 27(1): 184-188 (2008)
39		Stephen Plaza, Igor L. Markov, Valeria Bertacco: Optimizing Nonmonotonic Interconnect Using Functional Simulation and Logic Restructuring. IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2107-2119 (2008)
38		Ilya Wagner, Valeria Bertacco, Todd M. Austin: Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 380-393 (2008)
37		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: SafeResynth: A new technique for physical synthesis. Integration 41(4): 544-556 (2008)
	2007
36		Stephen Plaza, Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Node Mergers in the Presence of Don't Cares. ASP-DAC 2007: 414-419
35		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Safe Delay Optimization for Physical Synthesis. ASP-DAC 2007: 628-633
34		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Fixing Design Errors with Counterexamples and Resynthesis. ASP-DAC 2007: 944-949
33		Mojtaba Mehrara, Mona Attariyan, Smitha Shyam, Kypros Constantinides, Valeria Bertacco, Todd M. Austin: Low-cost protection for SER upsets and silicon defects. DATE 2007: 1146-1151
32		Ilya Wagner, Valeria Bertacco: Engineering trust with semantic guardians. DATE 2007: 743-748
31		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Automating post-silicon debugging and repair. ICCAD 2007: 91-98
30		Kai-Hui Chang, David A. Papa, Igor L. Markov, Valeria Bertacco: InVerS: An Incremental Verification System with Circuit Similarity Metrics and Error Visualization. ISQED 2007: 487-494
29		Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco: Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation. MICRO 2007: 97-108
28		Andrew DeOrio, Adam Bauserman, Valeria Bertacco: Chico: An On-chip Hardware Checker for Pipeline Control Logic. MTV 2007: 91-97
27		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Postplacement rewiring by exhaustive search for functional symmetries. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007)
26		Kai-Hui Chang, Valeria Bertacco, Igor L. Markov: Simulation-Based Bug Trace Minimization With BMC-Based Refinement. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 152-165 (2007)
25		Ilya Wagner, Valeria Bertacco, Todd M. Austin: Microprocessor Verification via Feedback-Adjusted Markov Models. IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1126-1138 (2007)
24		Kypros Constantinides, Stephen Plaza, Jason A. Blome, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Bin Zhang, Michael Orshansky: Architecting a reliable CMP switch architecture. TACO 4(1): (2007)
	2006
23		Valeria Bertacco: Scalable Hardware Verification with Symbolic Simulation. Springer 2006: I-XX, 1-177
22		Ilya Wagner, Valeria Bertacco, Todd M. Austin: Depth-driven verification of simultaneous interfaces. ASP-DAC 2006: 442-447
21		Smitha Shyam, Kypros Constantinides, Sujay Phadke, Valeria Bertacco, Todd M. Austin: Ultra low-cost defect protection for microprocessor pipelines. ASPLOS 2006: 73-82
20		Ilya Wagner, Valeria Bertacco, Todd M. Austin: Shielding against design flaws with field repairable control logic. DAC 2006: 344-347
19		Smitha Shyam, Valeria Bertacco: Distance-guided hybrid verification with GUIDO. DATE 2006: 1211-1216
18		Kypros Constantinides, Stephen Plaza, Jason A. Blome, Bin Zhang, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Michael Orshansky: BulletProof: a defect-tolerant CMP switch architecture. HPCA 2006: 5-16
17		Beth Isaksen, Valeria Bertacco: Verification through the principle of least astonishment. ICCAD 2006: 860-867
16		Valeria Bertacco: Low maintenance verification. SBCCI 2006: 12
15		Valeria Bertacco: Formal verification for real-world designs. SBCCI 2006: 5
	2005
14		Todd M. Austin, Valeria Bertacco, David Blaauw, Trevor N. Mudge: Opportunities and challenges for better than worst-case design. ASP-DAC 2005: 2-7
13		Stephen Plaza, Valeria Bertacco: STACCATO: disjoint support decompositions from BDDs through symbolic kernels. ASP-DAC 2005: 276-279
12		Ilya Wagner, Valeria Bertacco, Todd M. Austin: StressTest: an automatic approach to test generation via activity monitors. DAC 2005: 783-788
11		Kai-Hui Chang, Valeria Bertacco, Igor L. Markov: Simulation-based bug trace minimization with BMC-based refinement. ICCAD 2005: 1045-1051
10		Kai-Hui Chang, Igor L. Markov, Valeria Bertacco: Post-placement rewiring and rebuffering by exhaustive search for functional symmetries. ICCAD 2005: 56-63
9		Todd M. Austin, Valeria Bertacco: Deployment of Better Than Worst-Case Design: Solutions and Needs. ICCD 2005: 550-558
	2004
8		Seokwoo Lee, Shidhartha Das, Valeria Bertacco, Todd M. Austin, David Blaauw, Trevor N. Mudge: Circuit-aware architectural simulation. DAC 2004: 305-310
7		Nam Sung Kim, Taeho Kgil, Valeria Bertacco, Todd M. Austin, Trevor N. Mudge: Microarchitectural power modeling techniques for deep sub-micron microprocessors. ISLPED 2004: 212-217
	2002
6		Valeria Bertacco, Kunle Olukotun: Efficient state representation for symbolic simulation. DAC 2002: 99-104
	2000
5		Pei-Hsin Ho, Thomas R. Shiple, Kevin Harer, James H. Kukula, Robert F. Damiano, Valeria Bertacco, Jerry Taylor, Jiang Long: Smart Simulation Using Collaborative Formal and Simulation Engines. ICCAD 2000: 120-126
	1999
4		Valeria Bertacco, Maurizio Damiani, Stefano Quer: Cycle-Based Symbolic Simulation of Gate-Level Synchronous Circuits. DAC 1999: 391-396
	1997
3		Valeria Bertacco, Maurizio Damiani: The disjunctive decomposition of logic functions. ICCAD 1997: 78-82
	1996
2		Valeria Bertacco, Maurizio Damiani: Boolean Function Representation Using Parallel-Access Diagrams. Great Lakes Symposium on VLSI 1996: 112-117
1		Valeria Bertacco, Maurizio Damiani: Boolean Function Representation Based on Disjoint-Support Decompositions. ICCD 1996: 27-

Coauthor Index

1	Rawan Abdel-Khalek	[67] [79]
2	Miron Abramovici	[72]
3	Sarita V. Adve	[87]
4	Konstantinos Aisopos	[76] [83]
5	Mona Attariyan	[33]
6	Todd M. Austin	[7] [8] [9] [12] [14] [18] [20] [21] [22] [24] [25] [29] [33] [38] [41] [43] [46] [52] [71] [84] [87]
7	Adam Bauserman	[28] [47] [51]
8	Luca Benini	[77] [82]
9	Bob Bentley	[72]
10	Gautam Bhatnagar	[43]
11	David Blaauw (David T. Blaauw)	[8] [14] [59] [61] [85]
12	Jason A. Blome	[18] [24]
13	Albert Camilleri	[72]
14	Yu Cao	[41]
15	Kai-Hui Chang	[10] [11] [26] [27] [30] [31] [34] [35] [36] [37] [40] [42] [45] [53] [58] [65] [66]
16	Debapriya Chatterjee	[56] [60] [64] [68] [75] [81] [86]
17	Gregory K. Chen	[59] [85]
18	Lei Chen	[87]
19	Kypros Constantinides	[18] [21] [24] [29] [33] [46] [52]
20	Maurizio Damiani	[1] [2] [3] [4]
21	Robert F. Damiano	[5]
22	Shidhartha Das	[8]
23	Andrew DeOrio	[28] [47] [51] [54] [59] [60] [61] [63] [64] [73] [75] [76] [79] [80] [83] [85]
24	David Fick	[59] [61] [85]
25	Harry Foster	[72]
26	Xin Fu	[87]
27	Rajesh Galivanche	[72]
28	Joseph L. Greathouse	[43] [84]
29	J. Hao	[55]
30	Kevin Harer	[5]
31	Siva Kumar Sastry Hari	[87]
32	Pei-Hsin Ho	[5]
33	Alan J. Hu	[72]
34	Jin Hu	[61] [85]
35	Beth Isaksen	[17] [51]
36	Junhao Jiang	[87]
37	Mohammad Reza Kakoee	[77] [82]
38	Shakti Kapoor	[72]
39	Taeho Kgil	[7]
40	Daya Shanker Khudia	[80]
41	Nam Sung Kim	[7]
42	James H. Kukula	[5]
43	Chelsea LeBlanc	[84]
44	Seokwoo Lee	[8]
45	Jiang Long	[5]
46	Scott A. Mahlke	[18] [24] [41]
47	Biruk Mammo	[86]
48	Igor L. Markov	[10] [11] [26] [27] [30] [31] [34] [35] [36] [37] [39] [40] [42] [44] [45] [50] [53] [58] [65] [66]
49	Calvin McCarter	[81]
50	Mojtaba Mehrara	[33]
51	Alan Mishchenko	[66]
52	Ronny Morad	[86]
53	Trevor N. Mudge	[7] [8] [14]
54	Onur Mutlu	[29] [52]
55	Amir Nahir	[72] [86]
56	Kunle Olukotun (Oyekunle A. Olukotun)	[6]
57	Michael Orshansky	[18] [24]
58	David A. Papa	[30] [53]
59	Ritesh Parikh	[78] [79]
60	Li-Shiuan Peh	[76] [83]
61	Andrea Pellegrini	[46] [69] [71] [87]
62	Seth Pettie	[43]
63	Sujay Phadke	[21]
64	Dmitry Pidan	[86]
65	Stephen M. Plaza (Stephen Plaza)	[13] [18] [24] [36] [39] [44] [50]
66	Stefano Quer	[4]
67	David A. Ramos	[43]
68	Thomas R. Shiple	[5]
69	Smitha Shyam	[19] [21] [33]
70	Robert Smolinski	[87]
71	Shobana Sudhakar	[46]
72	Dennis Sylvester	[59] [61] [85]
73	Jerry Taylor	[5]
74	Ilya Wagner	[12] [20] [22] [25] [32] [38] [43] [48] [49] [54] [57]
75	Dan Zhang	[46]
76	Bin Zhang	[18] [24]
77	Avi Ziv	[72] [86]

Colors in the list of coauthors

Last update Sun May 27 04:04:01 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page