![]() | ![]() |
C. H. van Berkel
List of publications from the DBLP Bibliography Server - FAQ
| 2012 | ||
|---|---|---|
| 30 | Zhibin Yu, C. H. van Berkel, Hong Li: A complexity adaptive channel estimator for low power. DATE 2012: 1531-1536 | |
| 29 | Wei Tong, Orlando Moreira, Rick J. M. Nas, Kees van Berkel: Hard-Real-Time Scheduling on a Weakly Programmable Multi-core Processor with Application to Multi-standard Channel Decoding. IEEE Real-Time and Embedded Technology and Applications Symposium 2012: 151-160 | |
| 28 | Stephen Kosonocky, Vladimir Stojanovic, Kees van Berkel, Ming-Yang Chao, Tobias Knoll, Joshua Friedrich: Power/performance optimization of many-core processor SoCs. ISSCC 2012: 508-509 | |
| 2010 | ||
| 27 | Rick J. M. Nas, C. H. van Berkel: High throughput, low set-up time, reconfigurable linear Feedback Shift Registers. ICCD 2010: 31-37 | |
| 26 | Pascal Urard, Ken Takeuchi, Kerry Bernstein, Hideto Hidaka, Michael Phan, Joo Sun Choi, Bob Payne, Vladimir Stojanovic, Kees van Berkel, Takayasu Sakurai: Silicon 3D-integration technology and systems. ISSCC 2010: 510-511 | |
| 25 | Erik J. C. Rijshouwer, C. H. van Berkel: A Programmable, Scalable-Throughput Interleaver. EURASIP J. Wireless Comm. and Networking 2010: (2010) | |
| 2009 | ||
| 24 | C. H. van Berkel: Multi-core for mobile phones. DATE 2009: 1260-1265 | |
| 23 | C. H. van Berkel, T. A. van Roermund: Scalable Multi-Input-Multi-Output Queues With Application to Variation-Tolerant Architectures. IEEE Trans. VLSI Syst. 17(7): 920-923 (2009) | |
| 2008 | ||
| 22 | Jelte Peter Vink, Kees van Berkel, Pieter van der Wolf: Performance Analysis of SoC Architectures Based on Latency-Rate Servers. DATE 2008: 200-205 | |
| 21 | Akash Kumar, Kees van Berkel: Vectorization of Reed Solomon Decoding and Mapping on the EVP. DATE 2008: 450-455 | |
| 20 | John Dielissen, Nur Engin, Sergei Sawitzki, Kees van Berkel: Multistandard FEC Decoders for Wireless Devices. IEEE Trans. on Circuits and Systems 55-II(3): 284-288 (2008) | |
| 2007 | ||
| 19 | Micha Nelissen, Kees van Berkel, Sergei Sawitzki: Mapping A VLIWxSIMD Processor on an FPGA: Scalability and Performance. FPL 2007: 521-524 | |
| 2005 | ||
| 18 | M. Van Der Horst, Kees van Berkel, Johan Lukkien, Rudolf H. Mak: Recursive Filtering on a Vector DSP with Linear Speedup. ASAP 2005: 379-386 | |
| 17 | Kees van Berkel, Frank Heinle, Patrick P. E. Meuwissen, Kees Moerman, Matthias Weiss: Vector Processing as an Enabler for Software-Defined Radio in Handheld Devices. EURASIP J. Adv. Sig. Proc. 2005(16): 2613-2625 (2005) | |
| 2004 | ||
| 16 | Esko O. Dijk, Kees van Berkel, Ronald M. Aarts, Evert van Loenen: A 3-D Indoor Positioning Method using a Single Compact Base Station. PerCom 2004: 101-110 | |
| 2003 | ||
| 15 | Esko O. Dijk, Kees van Berkel, Ronald M. Aarts, Evert van Loenen: Ultrasonic 3D Position Estimation Using a Single Base Station. EUSAI 2003: 133-148 | |
| 14 | Frank te Beest, Ad M. G. Peeters, Kees van Berkel, Hans G. Kerkhoff: Synchronous Full-Scan for Asynchronous Handshake Circuits. J. Electronic Testing 19(4): 397-406 (2003) | |
| 13 | Kees van Berkel, Ad M. G. Peeters, Frank te Beest: Adding synchronous and LSSD modes to asynchronous circuits. Microprocessors and Microsystems 27(9): 461-471 (2003) | |
| 2002 | ||
| 12 | Frank te Beest, Kees van Berkel, Ad M. G. Peeters: Adding Synchronous and LSSD Modes to Asynchronous Circuits. ASYNC 2002: 161-170 | |
| 11 | Frank te Beest, Ad M. G. Peeters, Marc Verra, Kees van Berkel, Hans G. Kerkhoff: Automatic Scan Insertion and Test Generation for Asynchronous Circuits. ITC 2002: 804-813 | |
| 2001 | ||
| 10 | Ad M. G. Peeters, Kees van Berkel: Synchronous Handshake Circuits. ASYNC 2001: 86-95 | |
| 1998 | ||
| 9 | Hans van Gageldonk, Kees van Berkel, Ad M. G. Peeters, Daniel Baumann, Daniel Gloor, Gerhard Stegmann: An Asynchronous Low-Power 80C51 Microcontroller. ASYNC 1998: 96-107 | |
| 1995 | ||
| 8 | Ad M. G. Peeters, Kees van Berkel: Single-rail handshake circuits. ASYNC 1995: 53-62 | |
| 7 | Kees van Berkel, Ronan Burgess, Joep L. W. Kessels, Ad M. G. Peeters, Marly Roncken, Frits D. Schalij, Rik van de Wiel: A single-rail re-implementation of a DCC error detector using a generic standard-cell library. ASYNC 1995: 72- | |
| 6 | Kees van Berkel, Ferry Huberts, Ad M. G. Peeters: Stretching quasi delay insensitivity by means of extended isochronic forks. ASYNC 1995: 99- | |
| 1994 | ||
| 5 | Kees van Berkel, Ronan Burgess, Joep L. W. Kessels, Marly Roncken, Frits D. Schalij, Ad M. G. Peeters: Asynchronous Circuits for Low Power: A DCC Error Corrector. IEEE Design & Test of Computers 11(2): 22-32 (1994) | |
| 4 | Lars Skovby Nielsen, C. Niessen, Jens Sparsø, Kees van Berkel: Low-power operation using self-timed circuits and adaptive scaling of the supply voltage. IEEE Trans. VLSI Syst. 2(4): 391-397 (1994) | |
| 1993 | ||
| 3 | Kees van Berkel: VLSI Programming of a Modulo-N Counter with Constant Response Time and Constant Power. Asynchronous Design Methodologies 1993: 1-11 | |
| 2 | Jaco Haans, Kees van Berkel, Ad M. G. Peeters, Frits D. Schalij: Asynchronous Multipliers as Combinational Handshake Circuits. Asynchronous Design Methodologies 1993: 149-163 | |
| 1 | Kees van Berkel, Ronan Burgess, Joep L. W. Kessels, Marly Roncken, Frits D. Schalij: Characterization and Evaluation of a Compiled Asynchronous IC. Asynchronous Design Methodologies 1993: 209-221 | |
Colors in the list of coauthors
Last update Sun May 27 04:04:01 2012 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page