 | 2011 |
| 20 |  | Alain Fourmigue,
Giovanni Beltrame,
Gabriela Nicolescu,
El Mostapha Aboulhamid:
A linear-time approach for the transient thermal simulation of liquid-cooled 3d ics.
CODES+ISSS 2011: 197-206 |
| 19 |  | Giovanni Beltrame,
Gabriela Nicolescu:
A multi-objective decision-theoretic exploration algorithm for platform-based design.
DATE 2011: 1192-1195 |
| 18 |  | Alain Fourmigue,
Giovanni Beltrame,
Gabriela Nicolescu,
El Mostapha Aboulhamid,
Ian O'Connor:
Multi-granularity thermal evaluation of 3D MPSoC architectures.
DATE 2011: 575-578 |
| 2010 |
| 17 |  | Giovanni Beltrame,
Luca Fossati,
Donatella Sciuto:
Decision-Theoretic Design Space Exploration of Multiprocessor Platforms.
IEEE Trans. on CAD of Integrated Circuits and Systems 29(7): 1083-1095 (2010) |
| 2009 |
| 16 |  | Giovanni Beltrame,
Cristiana Bolchini,
Antonio Miele:
Multi-level fault modeling for transaction-level specifications.
ACM Great Lakes Symposium on VLSI 2009: 87-92 |
| 15 |  | Giovanni Beltrame,
Luca Fossati,
Donatella Sciuto:
A real-time application design methodology for MPSoCs.
DATE 2009: 767-772 |
| 14 |  | Giovanni Beltrame,
Luca Fossati,
Donatella Sciuto:
ReSP: A Nonintrusive Transaction-Level Reflective MPSoC Simulation Platform for Design Space Exploration.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(12): 1857-1869 (2009) |
| 2008 |
| 13 |  | Giovanni Beltrame,
Cristiana Bolchini,
Luca Fossati,
Antonio Miele,
Donatella Sciuto:
ReSP: A non-intrusive Transaction-Level Reflective MPSoC Simulation Platform for design space exploration.
ASP-DAC 2008: 673-678 |
| 12 |  | Giovanni Beltrame,
Luca Fossati,
Donatella Sciuto:
Concurrency emulation and analysis of parallel applications for multi-processor system-on-chip co-design.
CODES+ISSS 2008: 7-12 |
| 2007 |
| 11 |  | Giovanni Beltrame,
Cristiana Bolchini,
Luca Fossati,
Antonio Miele,
Donatella Sciuto:
A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip.
DFT 2007: 132-141 |
| 10 |  | Giovanni Beltrame,
Donatella Sciuto,
Cristina Silvano:
Multi-Accuracy Power and Performance Transaction-Level Modeling.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(10): 1830-1842 (2007) |
| 2006 |
| 9 |  | Giovanni Beltrame,
Dario Bruschi,
Donatella Sciuto,
Cristina Silvano:
Decision-theoretic exploration of multiProcessor platforms.
CODES+ISSS 2006: 205-210 |
| 8 |  | Giovanni Beltrame,
Donatella Sciuto,
Cristina Silvano,
Damien Lyonnard,
Chuck Pilkington:
Exploiting TLM and object introspection for system-level simulation.
DATE 2006: 100-105 |
| 7 |  | Giovanni Beltrame,
Donatella Sciuto,
Cristina Silvano,
Pierre G. Paulin,
Essaid Bensoudane:
An Application Mapping Methodology and Case Study for Multi-Processor On-Chip Architectures.
VLSI-SoC 2006: 146-151 |
| 6 |  | Pierre G. Paulin,
Chuck Pilkington,
Michel Langevin,
Essaid Bensoudane,
Damien Lyonnard,
Olivier Benny,
Bruno Lavigueur,
David Lo,
Giovanni Beltrame,
V. Gagne,
Gabriela Nicolescu:
Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia.
IEEE Trans. VLSI Syst. 14(7): 667-680 (2006) |
| 2004 |
| 5 |  | Giovanni Beltrame,
Gianluca Palermo,
Donatella Sciuto,
Cristina Silvano:
Plug-in of power models in the StepNP exploration platform: analysis of power/performance trade-offs.
CASES 2004: 85-92 |
| 2002 |
| 4 |  | William Fornaciari,
Vito Trianni,
Carlo Brandolese,
Donatella Sciuto,
Fabio Salice,
Giovanni Beltrame:
Modeling Assembly Instruction Timing in Superscalar Architectures.
ISSS 2002: 132-137 |
| 2001 |
| 3 |  | Giovanni Beltrame,
Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto,
Vito Trianni:
An Assembly-Level Execution-Time Model for Pipelined Architectures.
ICCAD 2001: 195-200 |
| 2 |  | Thimoty Barbieri,
Franca Garzotto,
Giovanni Beltrame,
Luca Ceresoli,
Marco Gritti,
Daniele Misani:
From Dust to Stardust: A Collaborative 3D Virtual Museum of Computer Science.
ICHIM (2) 2001: 341-345 |
| 1 |  | Giovanni Beltrame,
Carlo Brandolese,
William Fornaciari,
Fabio Salice,
Donatella Sciuto,
Vito Trianni:
Dynamic modeling of inter-instruction effects for execution time estimation.
ISSS 2001: 136-141 |