![]() | ![]() |
| 2008 | ||
|---|---|---|
| 1 | Santanu Sarkar, Ravi Sankar Prasad, Sanjoy Kumar Dey, Vinay Belde, Swapna Banerjee: An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture. ISCAS 2008: 149-152 | |
| 1 | Swapna Banerjee | [1] |
| 2 | Sanjoy Kumar Dey | [1] |
| 3 | Ravi Sankar Prasad | [1] |
| 4 | Santanu Sarkar | [1] |
Data released under the ODC-BY 1.0 license — See also our legal information page