![]() | ![]() |
| 2012 | ||
|---|---|---|
| 12 | Paul Beckett, Tayab Memon: Reconfigurable Blocks Based on Balanced Ternary. Signal Processing Systems 67(1): 3-13 (2012) | |
| 2011 | ||
| 11 | Kashfia Haque, Paul Beckett: A Radiation Hard Lut Block with Auto-Scrubbing. FPL 2011: 441-446 | |
| 10 | Kashfia Haque, Paul Beckett: A SOI EEPROM Based Configuration Cell with Simple Scrubbing Detection. VLSI Design 2011: 24-29 | |
| 2010 | ||
| 9 | Paul Beckett, Heiko Rudolph: Run. DELTA 2010: 245-249 | |
| 2009 | ||
| 8 | Paul Beckett: Power scalability in a mesh-connected reconfigurable architecture. ACM Trans. Embedded Comput. Syst. 9(2): (2009) | |
| 2008 | ||
| 7 | Paul Beckett: A Low-Power Reconfigurable Logic Array Based on Double-Gate Transistors. IEEE Trans. VLSI Syst. 16(2): 115-123 (2008) | |
| 2007 | ||
| 6 | Lianlian Zeng, Paul Beckett: Soft Error Rate Estimation in Deep Sub-micron CMOS. PRDC 2007: 210-216 | |
| 2005 | ||
| 5 | Paul Beckett: Low-power circuits using dynamic threshold devices. ACM Great Lakes Symposium on VLSI 2005: 213-216 | |
| 4 | Paul Beckett, S. C. Goldstein: Why area might reduce power in nanoscale CMOS. ISCAS (3) 2005: 2329-2332 | |
| 3 | Paul Beckett: Low-power spatial computing using dynamic threshold devices. ISCAS (3) 2005: 2345-2348 | |
| 2003 | ||
| 2 | Paul Beckett: Exploiting multiple functionality for nano-scale reconfigurable systems. ACM Great Lakes Symposium on VLSI 2003: 50-55 | |
| 1 | Paul Beckett: A Polymorphic Hardware Platform. IPDPS 2003: 175 | |
| 1 | S. C. Goldstein | [4] |
| 2 | Kashfia Haque | [10] [11] |
| 3 | Tayab Memon | [12] |
| 4 | Heiko Rudolph | [9] |
| 5 | Lianlian Zeng | [6] |
Colors in the list of coauthors
Last update Sun May 27 04:04:01 2012 CET by the DBLP Team —
Data released under the ODC-BY 1.0 license — See also our legal information page