 | 2010 |
|---|
| 8 |       | Abdelrezzak Bara,
Pirouz Bazargan-Sabet,
Remy Chevallier,
Dominique Ledu,
Emmanuelle Encrenaz,
Patricia Renault:
Formal Verification of Timed VHDL Programs.
FDL 2010: 80-85 |
| 2003 |
|---|
| 7 |  | Pirouz Bazargan-Sabet,
Patricia Renault:
An Event-Driven Approach to Crosstalk Noise Analysis.
Annual Simulation Symposium 2003: 319-326 |
| 2001 |
|---|
| 6 | | Pirouz Bazargan-Sabet,
Fabrice Ilponse:
Modeling crosstalk noise for deep submicron verification tools.
DATE 2001: 530-534 |
| 5 | | Pirouz Bazargan-Sabet,
Laurent Vuillemin:
An Approach to Mapping the Timing Behavior of VLSI Circuits on Emulators.
IEEE International Workshop on Rapid System Prototyping 2001: 168-173 |
| 4 | | Pirouz Bazargan-Sabet,
Fabrice Ilponse:
A Model for Crosstalk Noise Evaluation in Deep Submicron Processes.
ISQED 2001: 139-144 |
| 1998 |
|---|
| 3 | | Amar Guettaf,
Pirouz Bazargan-Sabet:
Efficient Partitioning Method For Distributed Logic Simulation of VLSI Circuits.
Annual Simulation Symposium 1998: 196-201 |
| 2 | | Amar Guettaf,
Pirouz Bazargan-Sabet:
Usinf Node Replication to improve Circuit's Partition in Distributed Logic Simulation.
ESM 1998: 235-237 |
| 1996 |
|---|
| 1 | | Julien Dunoyer,
Nizar Abdallah,
Pirouz Bazargan-Sabet:
A symbolic simulation approach in resolving signals' correlation.
Annual Simulation Symposium 1996: 203-211 |
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