 | 2012 |
| 14 |  | Muthu Manikandan Baskaran,
Nicolas Vasilache,
Benoît Meister,
Richard Lethin:
Automatic communication optimizations through memory reuse strategies.
PPOPP 2012: 277-278 |
| 2011 |
| 13 |  | Benoît Meister,
Nicolas Vasilache,
David Wohlford,
Muthu Manikandan Baskaran,
Allen Leung,
Richard Lethin:
R-Stream Compiler.
Encyclopedia of Parallel Computing 2011: 1756-1765 |
| 2010 |
| 12 |  | Muthu Manikandan Baskaran,
J. Ramanujam,
P. Sadayappan:
Automatic C-to-CUDA Code Generation for Affine Programs.
CC 2010: 244-263 |
| 11 |  | Muthu Manikandan Baskaran,
Albert Hartono,
Sanket Tavarageri,
Thomas Henretty,
J. Ramanujam,
P. Sadayappan:
Parameterized tiling revisited.
CGO 2010: 200-209 |
| 10 |  | Allen Leung,
Nicolas Vasilache,
Benoît Meister,
Muthu Manikandan Baskaran,
David Wohlford,
Cédric Bastoul,
Richard Lethin:
A mapping path for multi-GPGPU accelerated computers from a portable high level programming abstraction.
GPGPU 2010: 51-61 |
| 9 |  | Giridhar Sreenivasa Murthy,
Mahesh Ravishankar,
Muthu Manikandan Baskaran,
Ponnuswamy Sadayappan:
Optimal loop unrolling for GPGPU programs.
IPDPS 2010: 1-11 |
| 8 |  | Albert Hartono,
Muthu Manikandan Baskaran,
J. Ramanujam,
Ponnuswamy Sadayappan:
DynTile: Parametric tiled loop generation for parallel execution on multicore processors.
IPDPS 2010: 1-12 |
| 2009 |
| 7 |  | Albert Hartono,
Muthu Manikandan Baskaran,
Cédric Bastoul,
Albert Cohen,
Sriram Krishnamoorthy,
Boyana Norris,
J. Ramanujam,
P. Sadayappan:
Parametric multi-level tiling of imperfectly nested loops.
ICS 2009: 147-157 |
| 6 |  | Muthu Manikandan Baskaran,
Nagavijayalakshmi Vydyanathan,
Uday Bondhugula,
J. Ramanujam,
Atanas Rountev,
P. Sadayappan:
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors.
PPOPP 2009: 219-228 |
| 2008 |
| 5 |  | Uday Bondhugula,
Muthu Manikandan Baskaran,
Sriram Krishnamoorthy,
J. Ramanujam,
Atanas Rountev,
P. Sadayappan:
Automatic Transformations for Communication-Minimized Parallelization and Locality Optimization in the Polyhedral Model.
CC 2008: 132-146 |
| 4 |  | Muthu Manikandan Baskaran,
Uday Bondhugula,
Sriram Krishnamoorthy,
J. Ramanujam,
Atanas Rountev,
P. Sadayappan:
A compiler framework for optimization of affine loop nests for gpgpus.
ICS 2008: 225-234 |
| 3 |  | Uday Bondhugula,
Muthu Manikandan Baskaran,
Albert Hartono,
Sriram Krishnamoorthy,
J. Ramanujam,
Atanas Rountev,
P. Sadayappan:
Towards effective automatic parallelization for multicore systems.
IPDPS 2008: 1-5 |
| 2 |  | Muthu Manikandan Baskaran,
Uday Bondhugula,
Sriram Krishnamoorthy,
J. Ramanujam,
Atanas Rountev,
P. Sadayappan:
Automatic data movement and computation mapping for multi-level parallel architectures with explicitly managed memories.
PPOPP 2008: 1-10 |
| 2007 |
| 1 |  | Sriram Krishnamoorthy,
Muthu Manikandan Baskaran,
Uday Bondhugula,
J. Ramanujam,
Atanas Rountev,
P. Sadayappan:
Effective automatic parallelization of stencil computations.
PLDI 2007: 235-244 |