Bulent Basaran

	2009
5		Anirudh Devgan, Bulent Basaran, David Colleran, Mar Hershenson: Accelerated design of analog, mixed-signal circuits in Titan. ISPD 2009: 67-72
	2000
4		Rory McInerney, Kurt Leeper, Troy Hill, Heming Chan, Bulent Basaran, Lance McQuiddy: Methodology for repeater insertion management in the RTL, layout, floorplan and fullchip timing databases of the Itanium microprocessor. ISPD 2000: 99-104
	1999
3		Bulent Basaran, Kiran Ganesh, Raymond Y. K. Lau, Artour Levin, Miles McCoo, Srinivasan Rangarajan, Naresh Sehgal: GeneSys: A Leaf-Cell Layout Synthesis System for GHz VLSI Designs. VLSI Design 1999: 448-452
	1996
2		Bulent Basaran, Rob A. Rutenbar: An O(n) Algorithm for Transistor Stacking with Performance Constraints. DAC 1996: 221-226
	1993
1		Bulent Basaran, Rob A. Rutenbar, L. Richard Carley: Latchup-aware placement and parasitic-bounded routing of custom analog cells. ICCAD 1993: 415-421

Coauthor Index

1	L. Richard Carley	[1]
2	Heming Chan	[4]
3	David Colleran	[5]
4	Anirudh Devgan	[5]
5	Kiran Ganesh	[3]
6	Mar Hershenson	[5]
7	Troy Hill	[4]
8	Raymond Y. K. Lau (Raymond Yiu-Keung Lau, Raymond Lau)	[3]
9	Kurt Leeper	[4]
10	Artour Levin	[3]
11	Miles McCoo	[3]
12	Rory McInerney	[4]
13	Lance McQuiddy	[4]
14	Srinivasan Rangarajan	[3]
15	Rob A. Rutenbar	[1] [2]
16	Naresh Sehgal	[3]

Colors in the list of coauthors

Last update Sun May 27 04:04:01 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page