 | 2011 |
| 17 |  | Timothy M. Jones,
Sandro Bartolini,
Jonas Maebe,
Dominique Chanet:
Link-time optimization for power efficiency in a tagless instruction cache.
CGO 2011: 32-41 |
| 16 |  | Sandro Bartolini,
Pierfrancesco Foglia,
Cosimo Antonio Prete:
Eighth MEDEA Workshop.
T. HiPEAC 3: 91-92 (2011) |
| 2010 |
| 15 |  | Sandro Bartolini,
Pierfrancesco Foglia,
Marco Solinas,
Cosimo Antonio Prete:
Feedback-Driven Restructuring of Multi-threaded Applications for NUCA Cache Performance in CMPs.
SBAC-PAD 2010: 87-94 |
| 2008 |
| 14 |  | Timothy M. Jones,
Sandro Bartolini,
Bruno De Bus,
John Cavazos,
Michael F. P. O'Boyle:
Instruction Cache Energy Saving Through Compiler Way-Placement.
DATE 2008: 1196-1201 |
| 13 |  | Sandro Bartolini,
Irina Branovic,
Roberto Giorgi,
Enrico Martinelli:
Effects of Instruction-Set Extensions on an Embedded Processor: A Case Study on Elliptic Curve Cryptography over GF(2/sup m/).
IEEE Trans. Computers 57(5): 672-685 (2008) |
| 2007 |
| 12 |  | Sandro Bartolini,
Cinzia Castagnini,
Enrico Martinelli:
Inclusion of a Montgomery Multiplier Unit into an Embedded Processors Datapath to Speed-up Elliptic Curve Cryptography.
IAS 2007: 95-100 |
| 11 |  | Sandro Bartolini,
Pierfrancesco Foglia,
Cosimo Antonio Prete:
MEmory performance: DEaling with applications, systems and architecture.
SIGARCH Computer Architecture News 35(4): 4-5 (2007) |
| 2006 |
| 10 |  | Sandro Bartolini,
Pierfrancesco Foglia,
Cosimo Antonio Prete:
Embedded processors and systems: Architectural issues and solutions for emerging applications.
J. Embedded Computing 2(1): 1-3 (2006) |
| 9 |  | Sandro Bartolini,
Roberto Giorgi:
Issues in Embedded Single-Chip Multicore Architectures.
J. Embedded Computing 2(2): 137-139 (2006) |
| 8 |  | Sandro Bartolini,
Pierfrancesco Foglia,
Roberto Giorgi,
Cosimo Antonio Prete:
Memory performance: dealing with applications, systems and architecture.
SIGARCH Computer Architecture News 34(1): 1-2 (2006) |
| 2005 |
| 7 |  | Sandro Bartolini,
Cosimo Antonio Prete:
Optimizing instruction cache performance of embedded systems.
ACM Trans. Embedded Comput. Syst. 4(4): 934-965 (2005) |
| 6 |  | Sandro Bartolini,
Pierfrancesco Foglia,
Cosimo Antonio Prete:
Guests editor's introduction.
SIGARCH Computer Architecture News 33(3): 1-2 (2005) |
| 2004 |
| 5 |  | Sandro Bartolini,
Irina Branovic,
Roberto Giorgi,
Enrico Martinelli:
A Performance Evaluation of ARM ISA Extension for Elliptic Curve Cryptography over Binary Finite Fields.
SBAC-PAD 2004: 238-245 |
| 4 |  | Sandro Bartolini,
Cosimo Antonio Prete:
A proposal for input-sensitivity analysis of profile-driven optimizations on embedded applications.
SIGARCH Computer Architecture News 32(3): 70-77 (2004) |
| 2002 |
| 3 |  | Sandro Bartolini,
Cosimo Antonio Prete:
A cache-aware program transformation technique suitable for embedded systems.
Information & Software Technology 44(13): 783-795 (2002) |
| 2001 |
| 2 |  | Sandro Bartolini,
Cosimo Antonio Prete:
An Object Level Transformation Technique to Improve the Performance of Embedded Applications.
SCAM 2001: 26-34 |
| 1 |  | Sandro Bartolini,
Roberto Giorgi,
Jelica Protic,
Cosimo Antonio Prete,
M. Valero:
Parallel architecture and compilation techniques: selection of workshop papers, guests' editors introduction.
SIGARCH Computer Architecture News 29(5): 9-12 (2001) |