 | 2012 |
| 19 |  | Giovanni Agosta,
Alessandro Barenghi,
Gerardo Pelosi:
Exploiting Bit-level Parallelism in GPGPUs: a Case Study on KeeLoq Exhaustive Search Attacks.
ARCS Workshops 2012: 385-396 |
| 2011 |
| 18 |  | Amir Moradi,
Alessandro Barenghi,
Timo Kasper,
Christof Paar:
On the vulnerability of FPGA bitstream encryption against power analysis attacks: extracting keys from xilinx Virtex-II FPGAs.
ACM Conference on Computer and Communications Security 2011: 111-124 |
| 17 |  | Alessandro Barenghi,
Gerardo Pelosi:
Security and Privacy in Smart Grid Infrastructures.
DEXA Workshops 2011: 102-108 |
| 16 |  | Alessandro Barenghi,
Guido Bertoni,
Fabrizio De Santis,
Filippo Melzani:
On the Efficiency of Design Time Evaluation of the Resistance to Power Attacks.
DSD 2011: 777-785 |
| 15 |  | Alessandro Barenghi,
Guido Bertoni,
Andrea Palomba,
Ruggero Susella:
A novel fault attack against ECDSA.
HOST 2011: 161-166 |
| 14 |  | Alessandro Barenghi,
Cédric Hocquet,
David Bol,
François-Xavier Standaert,
Francesco Regazzoni,
Israel Koren:
Exploring the Feasibility of Low Cost Fault Injection Attacks on Sub-threshold Devices through an Example of a 65nm AES Implementation.
RFIDSec 2011: 48-60 |
| 13 |  | Alessandro Barenghi,
Guido Marco Bertoni,
Luca Breveglieri,
Gerardo Pelosi,
Andrea Palomba:
Fault attack to the elliptic curve digital signature algorithm with multiple bit faults.
SIN 2011: 63-72 |
| 12 |  | Alessandro Barenghi,
Gerardo Pelosi,
Yannick Teglia:
Information Leakage Discovery Techniques to Enhance Secure Chip Design.
WISTP 2011: 128-143 |
| 11 |  | Amir Moradi,
Alessandro Barenghi,
Timo Kasper,
Christof Paar:
On the Vulnerability of FPGA Bitstream Encryption against Power Analysis Attacks - Extracting Keys from Xilinx Virtex-II FPGAs.
IACR Cryptology ePrint Archive 2011: 390 (2011) |
| 2010 |
| 10 |  | Alessandro Barenghi,
Guido Bertoni,
Luca Breveglieri,
Mauro Pellicioli,
Gerardo Pelosi:
Low Voltage Fault Attacks to AES.
HOST 2010: 7-12 |
| 9 |  | Alessandro Barenghi,
Guido Marco Bertoni,
Luca Breveglieri,
Mauro Pellicioli,
Gerardo Pelosi:
Fault attack on AES with single-bit induced faults.
IAS 2010: 167-172 |
| 8 |  | Giovanni Agosta,
Alessandro Barenghi,
Fabrizio De Santis,
Gerardo Pelosi:
Record Setting Software Implementation of DES Using CUDA.
ITNG 2010: 748-755 |
| 7 |  | Alessandro Barenghi,
Gerardo Pelosi,
Yannick Teglia:
Improving first order differential power attacks through digital signal processing.
SIN 2010: 124-133 |
| 6 |  | Alessandro Barenghi,
Luca Breveglieri,
Israel Koren,
Gerardo Pelosi,
Francesco Regazzoni:
Countermeasures against fault attacks on software implemented AES: effectiveness and cost.
WESS 2010: 7 |
| 5 |  | Alessandro Barenghi,
Guido Bertoni,
Luca Breveglieri,
Mauro Pellicioli,
Gerardo Pelosi:
Low Voltage Fault Attacks to AES and RSA on General Purpose Processors.
IACR Cryptology ePrint Archive 2010: 130 (2010) |
| 2009 |
| 4 |  | Alessandro Barenghi,
Guido Bertoni,
Emanuele Parrinello,
Gerardo Pelosi:
Low Voltage Fault Attacks on the RSA Cryptosystem.
FDTC 2009: 23-31 |
| 3 |  | Andrea Di Biagio,
Alessandro Barenghi,
Giovanni Agosta,
Gerardo Pelosi:
Design of a parallel AES for graphics hardware using the CUDA framework.
IPDPS 2009: 1-8 |
| 2 |  | Giovanni Agosta,
Alessandro Barenghi,
Fabrizio De Santis,
Andrea Di Biagio,
Gerardo Pelosi:
Fast Disk Encryption through GPGPU Acceleration.
PDCAT 2009: 102-109 |
| 2008 |
| 1 |  | Alessandro Barenghi,
Guido Bertoni,
Luca Breveglieri,
Gerardo Pelosi:
A FPGA Coprocessor for the Cryptographic Tate Pairing over Fp.
ITNG 2008: 112-119 |