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| 2012 | ||
|---|---|---|
| 36 | Kishor Sarawadekar, Swapna Banerjee: VLSI design of memory-efficient, high-speed baseline MQ coder for JPEG 2000. Integration 45(1): 1-8 (2012) | |
| 35 | Kishor Sarawadekar, Harihar Bharat Indana, Deep Bera, Swapna Banerjee: VLSI-DSP based real time solution of DSC-SRI for an ultrasound system. Microprocessors and Microsystems - Embedded Hardware Design 36(1): 1-12 (2012) | |
| 2011 | ||
| 34 | Kishor Sarawadekar, Swapna Banerjee: An Efficient Pass-Parallel Architecture for Embedded Block Coder in JPEG 2000. IEEE Trans. Circuits Syst. Video Techn. 21(6): 825-836 (2011) | |
| 2010 | ||
| 33 | Anirban Das, Anindya Hazra, Swapna Banerjee: An Efficient Architecture for 3-D Discrete Wavelet Transform. IEEE Trans. Circuits Syst. Video Techn. 20(2): 286-296 (2010) | |
| 32 | Kaushik Bhattacharyya, Rakesh Biswas, Anindya Sundar Dhar, Swapna Banerjee: Architectural design and FPGA implementation of radix-4 CORDIC processor. Microprocessors and Microsystems - Embedded Hardware Design 34(2-4): 96-101 (2010) | |
| 2009 | ||
| 31 | Deep Bera, Leeladhar Agarwal, Swapna Banerjee: Multirate scan conversion of ultrasound images using warped distance based adaptive bilinear interpolation. CBMS 2009: 1-5 | |
| 30 | Kishor Sarawadekar, Swapna Banerjee: Efficient VLSI architecture for bit plane encoder of JPEG 2000. ICIP 2009: 2805-2808 | |
| 29 | Santanu Sarkar, Swapna Banerjee: An 8-bit 1.8 V 500 MSPS CMOS Segmented Current Steering DAC. ISVLSI 2009: 268-273 | |
| 2008 | ||
| 28 | Santanu Sarkar, Ravi Sankar Prasad, Sanjoy Kumar Dey, Vinay Belde, Swapna Banerjee: An 8-bit 1.8 V 500 MS/s CMOS DAC with a novel four-stage current steering architecture. ISCAS 2008: 149-152 | |
| 27 | Sounak Roy, Swapna Banerjee: A 9 bit 400 MHz CMOS Double-Sampled Sample-and-Hold Amplifier. VLSI Design 2008: 323-329 | |
| 2006 | ||
| 26 | Santanu Sarkar, A. Ghosh, Swapna Banerjee: A Fully Differential 11mW 10-bit 200MS/s Sample and Hold in 0.25µm BiCMOS Technology. APCCAS 2006: 1-4 | |
| 25 | Abhijeet Jadhav, Swapna Banerjee, P. K. Dutta, R. R. Paul, Mausami Pal, P. Banerjee, K. Chaudhuri, J. Chatterjee: Quantitative Analysis of Histopathological Features of Precancerous Lesion and Condition Using Image Processing Technique. CBMS 2006: 231-236 | |
| 24 | J. Bhattacharyya, P. Mandal, R. Banerjee, Swapna Banerjee: Real Time Dynamic Receive Apodization for an Ultrasound Imaging System. VLSI Design 2006: 534-537 | |
| 23 | Debashis Dutta, Ritesh Ujjwal, Swapna Banerjee: Design of Low-Voltage Low-Power Continuous-Time Filter for Hearing Aid Application Using CMOS Current Conveyor Based Translinear Loop. VLSI Design 2006: 587-592 | |
| 22 | Sanjoy Kumar Dey, Swapna Banerjee: An 8-Bit, 3.8GHz Dynamic BiCMOS Comparator for High-Performance ADC. VLSI Design 2006: 593-598 | |
| 2005 | ||
| 21 | Samiran Halder, Arindrajit Ghosh, Ravi Sankar Prasad, Anirban Chatterjee, Swapna Banerjee: A 160MSPS 8-Bit Pipeline Based ADC. VLSI Design 2005: 313-318 | |
| 20 | Samiran Halder, Swapna Banerjee, Arindrajit Ghosh, Ravi Sankar Prasad, Anirban Chatterjee, Sanjoy Kumar Dey: A 10-Bit 80-MSPS 2.5-V 27.65-mW 0.185-mm2 Segmented Current Steering CMOS DAC. VLSI Design 2005: 319-322 | |
| 19 | Debashis Dutta, Wouter A. Serdijn, Swapna Banerjee, Sriram Gupta: A New CMOS Current Conveyors Based Translinear Loop for Log-Domain Circuit Design. VLSI Design 2005: 850-853 | |
| 18 | Koushik Maharatna, Swapna Banerjee, Eckhard Grass, Milos Krstic, Alfonso Troya: Modified virtually scaling-free adaptive CORDIC rotator algorithm and architecture. IEEE Trans. Circuits Syst. Video Techn. 15(11): 1463-1474 (2005) | |
| 2004 | ||
| 17 | Bipul Das, Swapna Banerjee: Homogeneity Induced Inertial Snake with Application to Medical Image Segmentation. CBMS 2004: 304-309 | |
| 16 | Anindya Hazra, J. Bhattacharyya, Swapna Banerjee: Real Time Noise Cleaning of Ultrasound Images. CBMS 2004: 379-384 | |
| 15 | Abhishek Mitra, Swapna Banerjee: A New Interpolation Free Method for X-ray CT Image Reconstruction. CBMS 2004: 54- | |
| 14 | Koushik Maharatna, Alfonso Troya, Swapna Banerjee, Eckhard Grass, Milos Krstic: A 16-bit CORDIC rotator for high-speed wireless LAN. PIMRC 2004: 1747-1751 | |
| 2003 | ||
| 13 | Bipul Das, Swapna Banerjee: A Novel Ram Architecture For Bit-Plane Based Coding. DCC 2003: 421 | |
| 12 | Manisha Pattanaik, Swapna Banerjee: A New Approach to Analyze a Sub-micron CMOS Inverter. VLSI Design 2003: 116-121 | |
| 11 | Bipul Das, Swapna Banerjee: A Memory Efficient 3-D DWT Architecture. VLSI Design 2003: 208- | |
| 2002 | ||
| 10 | Bipul Das, Swapna Banerjee: A Wavelet Based Low Complexity Embedded Block Coding Algorithm. DCC 2002: 452 | |
| 2001 | ||
| 9 | Bipul Das, Swapna Banerjee: A CORDIC based array architecture for complex discrete wavelet transform. ACM Great Lakes Symposium on VLSI 2001: 79-84 | |
| 8 | Ayan Banerjee, Anindya Sundar Dhar, Swapna Banerjee: FPGA realization of a CORDIC based FFT processor for biomedical signal processing. Microprocessors and Microsystems 25(3): 131-142 (2001) | |
| 7 | Koushik Maharatna, Swapna Banerjee: A VLSI array architecture for Hough transform. Pattern Recognition 34(7): 1503-1512 (2001) | |
| 6 | Koushik Maharatna, A. S. Dhar, Swapna Banerjee: A VLSI array architecture for realization of DFT, DHT, DCT and DST. Signal Processing 81(9): 1813-1822 (2001) | |
| 2000 | ||
| 5 | Bipul Das, S. K. Mitra, Swapna Banerjee: Knowledge Base System for Diagnostic Assessment of Doppler Spectogram. MICAI 2000: 405-416 | |
| 1995 | ||
| 4 | G. Hari Rama Krishna, Amit K. Aditya, Nirmal B. Chakrabarti, Swapna Banerjee: Analysis of temperature dependence of Si-Ge HBT. VLSI Design 1995: 268-271 | |
| 3 | G. Hari Rama Krishna, Amit K. Aditya, Nirmal B. Chakrabarti, Swapna Banerjee: Finite element analysis of SiGe heterojunction devices. IEEE Trans. on CAD of Integrated Circuits and Systems 14(7): 803-814 (1995) | |
| 1994 | ||
| 2 | G. Hari Rama Krishna, Nirmal B. Chakrabarti, Swapna Banerjee: Finite Element Analysis of SIGe npn HBT. VLSI Design 1994: 319-322 | |
| 1971 | ||
| 1 | S. K. Mitra, Swapna Banerjee: On the Probability Distribution of Round-off Errors Propagated in Tabular Differences. Australian Computer Journal 3(2): 60-68 (1971) | |
Colors in the list of coauthors
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