 | 2011 |
|---|
| 8 |       | Pritha Banerjee,
Megha Sangtani,
Susmita Sur-Kolay:
Floorplanning for Partially Reconfigurable FPGAs.
IEEE Trans. on CAD of Integrated Circuits and Systems 30(1): 8-17 (2011) |
| 7 | | Pritha Banerjee,
Debasri Saha,
Susmita Sur-Kolay:
Cone-based placement for field programmable gate arrays.
IET Computers & Digital Techniques 5(1): 49-62 (2011) |
| 2009 |
|---|
| 6 | | Pritha Banerjee,
Megha Sangtani,
Susmita Sur-Kolay:
Floorplanning for Partial Reconfiguration in FPGAs.
VLSI Design 2009: 125-130 |
| 5 | | Pritha Banerjee,
Susmita Sur-Kolay,
Arijit Bishnu,
Sandip Das,
Subhas C. Nandy,
Subhasis Bhattacharjee:
FPGA placement using space-filling curves: Theory meets practice.
ACM Trans. Embedded Comput. Syst. 9(2): (2009) |
| 4 | | Pritha Banerjee,
Susmita Sur-Kolay,
Arijit Bishnu:
Fast Unified Floorplan Topology Generation and Sizing on Heterogeneous FPGAs.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(5): 651-661 (2009) |
| 2007 |
|---|
| 3 | | Pritha Banerjee,
Susmita Sur-Kolay:
Faster Placer for Island-Style FPGAs.
ICCTA 2007: 117-121 |
| 2 | | Pritha Banerjee,
Susmita Sur-Kolay,
Arijit Bishnu:
Floorplanning in Modern FPGAs.
VLSI Design 2007: 893-898 |
| 2005 |
|---|
| 1 |  | Pritha Banerjee,
Subhasis Bhattacharjee,
Susmita Sur-Kolay,
Sandip Das,
Subhas C. Nandy:
Fast FPGA Placement using Space-filling Curve.
FPL 2005: 415-420 |
Data released under the ODC-BY 1.0 license — See also our legal information page