dblp.uni-trier.dewww.dagstuhl.dewww.uni-trier.de

Mouna Baklouti Coauthor index pubzone.org

List of publications from the DBLP Bibliography Server - FAQ
Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo

DBLP keys2012
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLEmna Kallel, Yassine Aoudni, Mouna Baklouti, Mohamed Abid: Mppsocgen: A framework for automatic generation of mppsoc architecture CoRR abs/1204.6662: (2012)
2011
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMouna Baklouti, Manel Ammar, Philippe Marquet, Mohamed Abid, Jean-Luc Dekeyser: A model-driven based framework for rapid parallel SoC FPGA prototyping. International Symposium on Rapid System Prototyping 2011: 149-155
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLYassine Aydi, Mouna Baklouti, Mohamed Abid, Jean-Luc Dekeyser: A multi-level design methodology of multistage interconnection network for MPSOCs. IJCAT 42(2/3): 191-203 (2011)
2010
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMouna Baklouti, Philippe Marquet, Jean-Luc Dekeyser, Mohamed Abid: Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chip. ARC 2010: 110-121
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMouna Baklouti, Mohamed Abid, Philippe Marquet, Jean-Luc Dekeyser: IP Based Configurable SIMD Massively Parallel SoC. FPL 2010: 247-250
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMouna Baklouti, Yassine Aydi, Philippe Marquet, Jean-Luc Dekeyser, Mohamed Abid: Scalable mpNoC for massively parallel systems - Design and implementation on FPGA. Journal of Systems Architecture - Embedded Systems Design 56(7): 278-292 (2010)
2009
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMouna Baklouti, Mohamed Abid, Philippe Marquet, Jean-Luc Dekeyser: Study and integration of a parametric neighbouring interconnection network in a massively parallel architecture on FPGA. AICCSA 2009: 368-373

Coauthor Index

1Mohamed Abid [1] [2] [3] [4] [5] [6] [7]
2Manel Ammar [6]
3Yassine Aoudni [7]
4Yassine Aydi [2] [5]
5Jean-Luc Dekeyser [1] [2] [3] [4] [5] [6]
6Emna Kallel [7]
7Philippe Marquet [1] [2] [3] [4] [6]

Last update Sun May 27 04:04:01 2012 CET by the DBLP TeamThis material is Open Data Data released under the ODC-BY 1.0 license — See also our legal information page