Y. Bajot

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2001

2 Y. Bajot, H. Mehrez: Customizable DSP architecture for ASIP core design. ISCAS (4) 2001: 302-305

1 Y. Dumonteix, Y. Bajot, H. Mehrez: A fast and low-power distance computation unit dedicated to neural networks, based on redundant arithmetic. ISCAS (4) 2001: 878-881

	2001
2		Y. Bajot, H. Mehrez: Customizable DSP architecture for ASIP core design. ISCAS (4) 2001: 302-305
1		Y. Dumonteix, Y. Bajot, H. Mehrez: A fast and low-power distance computation unit dedicated to neural networks, based on redundant arithmetic. ISCAS (4) 2001: 878-881

Coauthor Index

1 Y. Dumonteix [1]

2 H. Mehrez [1] [2]

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