Amer Baghdadi

	2012
36		Salim Haddad, Amer Baghdadi, Michel Jézéquel: On the Convergence Speed of Turbo Demodulation with Turbo Decoding CoRR abs/1203.5037: (2012)
	2011
35		Purushotham Murugappa, Rachid Al-Khayat, Amer Baghdadi, Michel Jézéquel: A flexible high throughput multi-ASIP architecture for LDPC and turbo decoding. DATE 2011: 228-233
34		Pallavi Reddy, Fabien Clermidy, Amer Baghdadi, Michel Jézéquel: A low complexity stopping criterion for reducing power consumption in turbo decoders. DATE 2011: 649-654
33		Rachid Al-Khayat, Purushotham Murugappa, Amer Baghdadi, Michel Jézéquel: Area and throughput optimized ASIP for multi-standard turbo decoding. International Symposium on Rapid System Prototyping 2011: 79-84
32		Atif Raza Jafri, Amer Baghdadi, Michel Jézéquel: Parallel MIMO Turbo Equalization. IEEE Communications Letters 15(3): 290-292 (2011)
31		Maurizio Martina, Guido Masera, Hazem Moussa, Amer Baghdadi: On chip interconnects for multiprocessor turbo decoding architectures. Microprocessors and Microsystems - Embedded Hardware Design 35(2): 167-181 (2011)
	2010
30		Atif Raza Jafri, Amer Baghdadi, Michel Jézéquel: Rapid design and prototyping of universal soft demapper. ISCAS 2010: 3769-3772
29		Olivier Muller, Amer Baghdadi, Michel Jézéquel: Parallelism Efficiency in Convolutional Turbo Decoding. EURASIP J. Adv. Sig. Proc. 2010: (2010)
	2009
28		Atif Raza Jafri, Daoud Karakolah, Amer Baghdadi, Michel Jézéquel: ASIP-based flexible MMSE-IC Linear Equalizer for MIMO turbo-equalization applications. DATE 2009: 1620-1625
27		Fabrizio Vacca, Guido Masera, Hazem Moussa, Amer Baghdadi, Michel Jézéquel: Flexible Architectures for LDPC Decoders Based on Network on Chip Paradigm. DSD 2009: 582-589
26		Atif Raza Jafri, Amer Baghdadi, Michel Jézéquel: Rapid Prototyping of ASIP-based Flexible MMSE-IC Linear Equalizer. IEEE International Workshop on Rapid System Prototyping 2009: 130-133
25		Jean Saad, Amer Baghdadi, Frantz Bodereau: FPGA-based Radar Signal Processing for Automotive Driver Assistance System. IEEE International Workshop on Rapid System Prototyping 2009: 196-199
24		Chafic Jaber, Andreas Kanstein, Ludovic Apvrille, Amer Baghdadi, Patricia Le Moenner, Renaud Pacalet: High-Level System Modeling for Rapid HW/SW Architecture Exploration. IEEE International Workshop on Rapid System Prototyping 2009: 88-94
23		Atif Raza Jafri, Amer Baghdadi, Michel Jézéquel: ASIP-Based Universal Demapper for Multiwireless Standards. Embedded Systems Letters 1(1): 9-13 (2009)
22		Olivier Muller, Amer Baghdadi, Michel Jézéquel: From Parallelism Levels to a Multi-ASIP Architecture for Turbo Decoding. IEEE Trans. VLSI Syst. 17(1): 92-102 (2009)
	2008
21		Hazem Moussa, Amer Baghdadi, Michel Jézéquel: Binary de Bruijn on-chip network for a flexible multiprocessor LDPC decoder. DAC 2008: 429-434
20		Olivier Muller, Amer Baghdadi, Michel Jézéquel: From Application to ASIP-based FPGA Prototype: a Case Study on Turbo Decoding. IEEE International Workshop on Rapid System Prototyping 2008: 128-134
19		Hazem Moussa, Amer Baghdadi, Michel Jézéquel: Binary de Bruijn interconnection network for a flexible LDPC/turbo decoder. ISCAS 2008: 97-100
	2007
18		Hazem Moussa, Olivier Muller, Amer Baghdadi, Michel Jézéquel: Butterfly and benes-based on-chip communication networks for multiprocessor turbo decoding. DATE 2007: 654-659
	2006
17		Olivier Muller, Amer Baghdadi, Michel Jézéquel: ASIP-based multiprocessor SoC design for simple and double binary turbo decoding. DATE 2006: 1330-1335
16		Olivier Muller, Amer Baghdadi, Michel Jézéquel: On the Parallelism of Convolutional Turbo Decoding and Interleaving Interference. GLOBECOM 2006
	2005
15		Nacer-Eddine Zergainoh, Amer Baghdadi, Ahmed Amine Jerraya: Hardware/software codesign of on-chip communication architecture for application-specific multiprocessor system-on-chip. IJES 1(1/2): 112-124 (2005)
	2004
14		Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik Chae, Ahmed Amine Jerraya: An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory. DAC 2004: 250-255
13		Ferid Gharsalli, Amer Baghdadi, Marius Bonaciu, Giedrius Majauskas, Wander O. Cesário, Ahmed Amine Jerraya: An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor. IEEE International Workshop on Rapid System Prototyping 2004: 80-87
12		Nacer-Eddine Zergainoh, Amer Baghdadi, Ahmed Amine Jerraya: A generic architecture model based-methodology for an efficient design of hardware/software application-specific multiprocessor System-on-Chip. Annales des Télécommunications 59(7-8): 784-806 (2004)
	2003
11		Arif Sasongko, Amer Baghdadi, Frédéric Rousseau, Ahmed Amine Jerraya: Embedded Application Prototyping on a Communication-Restricted Reconfigurable. IEEE International Workshop on Rapid System Prototyping 2003: 33-39
10		Arif Sasongko, Amer Baghdadi, Frédéric Rousseau, Ahmed Amine Jerraya: Towards SoC Validation Through Prototyping: A Systematic Approach Based on Reconfigurable Platform. Design Autom. for Emb. Sys. 8(2-3): 155-171 (2003)
	2002
9		Wander O. Cesário, Amer Baghdadi, Lovic Gauthier, Damien Lyonnard, Gabriela Nicolescu, Yanick Paviot, Sungjoo Yoo, Ahmed Amine Jerraya, Mario Diaz-Nava: Component-based design approach for multicore SoCs. DAC 2002: 789-794
8		Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, Ahmed Amine Jerraya: Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems. IEEE Trans. Software Eng. 28(9): 822-831 (2002)
7		Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, Ahmed Amine Jerraya: Exploration de l'espace des solutions architecturales dans le codesign. Technique et Science Informatiques 21(1): 9-35 (2002)
	2001
6		Sungjoo Yoo, Gabriela Nicolescu, Damien Lyonnard, Amer Baghdadi, Ahmed Amine Jerraya: A generic wrapper architecture for multi-processor SoC cosimulation and design. CODES 2001: 195-200
5		Damien Lyonnard, Sungjoo Yoo, Amer Baghdadi, Ahmed Amine Jerraya: Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip. DAC 2001: 518-523
4		Amer Baghdadi, Damien Lyonnard, Nacer-Eddine Zergainoh, Ahmed Amine Jerraya: An efficient architecture model for systematic design of application-specific multiprocessor SoC. DATE 2001: 55-63
	2000
3		Amer Baghdadi, Nacer-Eddine Zergainoh, Damien Lyonnard, Ahmed Amine Jerraya: Generic Architecture Platform for Multiprocessor System-On-Chip Design. DIPES 2000: 53-64
2		Nacer-Eddine Zergainoh, Amer Baghdadi, Ludovic Tambour, Damien Lyonnard, Lovic Gauthier, Ahmed Amine Jerraya: Framework for System Design, Validation and Fast Prototyping of Multiprocessor System-On-Chip. DIPES 2000: 99-110
1		Amer Baghdadi, Nacer-Eddine Zergainoh, Wander O. Cesário, T. Roudier, Ahmed Amine Jerraya: Design Space Exploration for Hardware/Software Codesign of Multiprocessor Systems. IEEE International Workshop on Rapid System Prototyping 2000: 8-13

Coauthor Index

1	Rachid Al-Khayat	[33] [35]
2	Ludovic Apvrille	[24]
3	Frantz Bodereau	[25]
4	Marius Bonaciu	[13] [14]
5	Wander O. Cesário	[1] [7] [8] [9] [13]
6	Soo-Ik Chae	[14]
7	Fabien Clermidy	[34]
8	Mario Diaz-Nava	[9]
9	Lovic Gauthier	[2] [9]
10	Ferid Gharsalli	[13]
11	Salim Haddad	[36]
12	Sang-Il Han	[14]
13	Chafic Jaber	[24]
14	Atif Raza Jafri	[23] [26] [28] [30] [32]
15	Ahmed Amine Jerraya	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
16	Michel Jézéquel	[16] [17] [18] [19] [20] [21] [22] [23] [26] [27] [28] [29] [30] [32] [33] [34] [35] [36]
17	Andreas Kanstein	[24]
18	Daoud Karakolah	[28]
19	Damien Lyonnard	[2] [3] [4] [5] [6] [9]
20	Giedrius Majauskas	[13]
21	Maurizio Martina	[31]
22	Guido Masera	[27] [31]
23	Patricia Le Moenner	[24]
24	Hazem Moussa	[18] [19] [21] [27] [31]
25	Olivier Muller	[16] [17] [18] [20] [22] [29]
26	Purushotham Murugappa	[33] [35]
27	Gabriela Nicolescu	[6] [9]
28	Renaud Pacalet	[24]
29	Yanick Paviot	[9]
30	Pallavi Reddy	[34]
31	T. Roudier	[1]
32	Frédéric Rousseau	[10] [11]
33	Jean Saad	[25]
34	Arif Sasongko	[10] [11]
35	Ludovic Tambour	[2]
36	Fabrizio Vacca	[27]
37	Sungjoo Yoo	[5] [6] [9]
38	Nacer-Eddine Zergainoh	[1] [2] [3] [4] [7] [8] [12] [15]

Colors in the list of coauthors

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