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| 2011 | ||
|---|---|---|
| 23 | Kon-Woo Kwon, Kwang-Hyun Baek, Jeong Woo Lee: High-Speed and Low-Complexity Decoding Architecture for Double Binary Turbo Code. IEICE Transactions 94-A(11): 2458-2461 (2011) | |
| 2010 | ||
| 22 | Jeong Hun Kim, Suki Kim, Kwang-Hyun Baek: A Low Power SOC Architecture for the V2.0+EDR Bluetooth Using a Unified Verification Platform. IEICE Transactions 93-D(9): 2500-2508 (2010) | |
| 21 | Hong Chang Yeoh, Jae-Hun Jung, Yun-Hwan Jung, Kwang-Hyun Baek: A 1.3-GHz 350-mW Hybrid Direct Digital Frequency Synthesizer in 90-nm CMOS. J. Solid-State Circuits 45(9): 1845-1855 (2010) | |
| 20 | Dosam Hwang, Ngoc Thanh Nguyen, Jason J. Jung, Abolghasem Sadeghi-Niaraki, Kwang-Hyun Baek, Youngshin Han: A Semantic Wiki Framework for Reconciling Conflict Collaborations Based on Selecting Consensus Choice. J. UCS 16(7): 1024-1035 (2010) | |
| 2008 | ||
| 19 | Jae-Jin Jung, Kwang-Hyun Baek, Shin-Il Lim, Suki Kim, Sung-Mo Kang: Design of a 6 bit 1.25 GS/s DAC for WPAN. ISCAS 2008: 2262-2265 | |
| 18 | Yun-Jeong Kim, Jong-Ho Lee, Ja-Hyun Koo, Kwang-Hyun Baek, Suki Kim: 6-bit 1.6-GS/s 85-mW Flash Analog to Digital Converter Using Symmetric Three-Input Comparator. IEICE Transactions 91-C(3): 392-395 (2008) | |
| 2007 | ||
| 17 | Chris Masone, Kwang-Hyun Baek, Sean W. Smith: WSKE: Web Server Key Enabled Cookies. Financial Cryptography 2007: 294-306 | |
| 16 | Soon-Ik Cho, Suki Kim, Shin-Il Lim, Kwang-Hyun Baek: A 6-bit 2.5GSample/s Flash ADC using Immanent C2MOS Comparator in 0.18um CMOS. ISCAS 2007: 3379-3382 | |
| 15 | Jeong Hun Kim, Jeongwoo Park, Kwangjae Lee, Kyoungbum Kim, Kwang-Hyun Baek, Suki Kim: Surveillance camera SOC architecture using one-bit motion detection for portable applications. SoCC 2007: 71-74 | |
| 14 | Youngkwon Jo, Hoyoung Park, Sanghyuk Yang, Suki Kim, Kwang-Hyun Baek: Digitally Controlled Duty Cycle Corrector with 1 ps Resolution. IEICE Transactions 90-C(9): 1841-1843 (2007) | |
| 2005 | ||
| 13 | Bo Hu, Zhao Li, Lili Zhou, C.-J. Richard Shi, Kwang-Hyun Baek, Myung-Jun Choe: Model-compiler based efficient statistical circuit analysis: an industry case study of a 4 GHz/6-bit ADC/DAC/DEMUX ASIC. ISCAS (6) 2005: 5621-5624 | |
| 12 | Ge Yang, Seong-Ook Jung, Kwang-Hyun Baek, Soo Hwan Kim, Suki Kim, Sung-Mo Kang: A 32-bit carry lookahead adder using dual-path all-N logic. IEEE Trans. VLSI Syst. 13(8): 992-996 (2005) | |
| 11 | Edward Merlo, Kwang-Hyun Baek: High-Speed Low-Power Small-Area Accumulator Designs for Direct Digital Frequency Synthesizers. IEICE Transactions 88-A(5): 1373-1378 (2005) | |
| 10 | Kwang-Hyun Baek: Addressing a High-Speed D/A Converter Design for Mixed-Mode VLSI Systems. IEICE Transactions 88-C(5): 1053-1060 (2005) | |
| 2004 | ||
| 9 | Ge Yang, Seong-Ook Jung, Kwang-Hyun Baek, Soo Hwan Kim, Suki Kim, Sung-Mo Kang: A low-power 1.85 GHz 32-bit carry lookahead adder using Dual Path All-N-Logic. ISCAS (2) 2004: 781-784 | |
| 2003 | ||
| 8 | Edward Merlo, Kwang-Hyun Baek, Myung-Jun Choe: Exponential split accumulator for high-speed reduced area low-power direct digital frequency synthesizers. ACM Great Lakes Symposium on VLSI 2003: 249-252 | |
| 7 | Kwang-Hyun Baek, Myung-Jun Choe, Edward Merlo, Sung-Mo Kang: 1-GS/s, 12-bit SiGe BiCMOS D/A converter for high-speed DDFs. ISCAS (1) 2003: 901-904 | |
| 6 | Kwang-Hyun Baek, Myung-Jun Choe, Sung-Mo Kang: An Efficient Calibration Technique for Systematic Current-Mismatch of D/A Converters. ISVLSI 2003: 80-86 | |
| 5 | Yong Sin Kim, Soo Hwan Kim, Kwang-Hyun Baek, Suki Kim, Sung-Mo Kang: Multiple Trigonometric Approximation of Sine-Amplitude with Small ROM Size for Direct Digital Frequency Synthesizers. VLSI Design 2003: 261- | |
| 2002 | ||
| 4 | Kwang-Hyun Baek, Myung-Jun Choe, Sung-Mo Kang: A low-voltage high-speed BiCMOS current switch with enhanced-spectral performance. ISCAS (5) 2002: 53-56 | |
| 2001 | ||
| 3 | Seung-Moon Yoo, Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang: New current-mode sense amplifiers for high density DRAM and PIM architectures. ISCAS (4) 2001: 938-941 | |
| 2000 | ||
| 2 | Ki-Wook Kim, Kwang-Hyun Baek, Naresh R. Shanbhag, C. L. Liu, Sung-Mo Kang: Coupling-Driven Signal Encoding Scheme for Low-Power Interface Design. ICCAD 2000: 318-321 | |
| 1 | Chulwoo Kim, Jaesik Lee, Kwang-Hyun Baek, Eric Martina, Sung-Mo Kang: High-Performance, Low-Power Skewed Static Logic in Very Deep-Submicron (VDSM) Technology. ICCD 2000: 59-64 | |
Colors in the list of coauthors
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