 | 2010 |
| 5 |  | Yoon Jae Seong,
Eyee Hyun Nam,
Jinhyuk Yoon,
Hongseok Kim,
Jin-yong Choi,
Sookwan Lee,
Young Hyun Bae,
Jaejin Lee,
Yookun Cho,
Sang Lyul Min:
Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture.
IEEE Trans. Computers 59(7): 905-921 (2010) |
| 1995 |
| 4 |  | Yerang Hur,
Young Hyun Bae,
Sung-Soo Lim,
Sung-Kwan Kim,
Byung-Do Rhee,
Sang Lyul Min,
Chang Yun Park,
Heonshik Shin,
Chong-Sang Kim:
Worst Case Timing Analysis of RISC Processors: R3000/R3010 Case Study.
IEEE Real-Time Systems Symposium 1995: 308-321 |
| 3 |  | Sung-Soo Lim,
Young Hyun Bae,
Gyu Tae Jang,
Byung-Do Rhee,
Sang Lyul Min,
Chang Yun Park,
Heonshik Shin,
Kunsoo Park,
Soo-Mook Moon,
Chong-Sang Kim:
An Accurate Worst Case Timing Analysis for RISC Processors.
IEEE Trans. Software Eng. 21(7): 593-604 (1995) |
| 1994 |
| 2 |  | Sung-Soo Lim,
Young Hyun Bae,
Gyu Tae Jang,
Byung-Do Rhee,
Sang Lyul Min,
Chang Yun Park,
Heonshik Shin,
Kunsoo Park,
Chong-Sang Kim:
An Accurate Worst Case Timing Analysis Technique for RISC Processors.
IEEE Real-Time Systems Symposium 1994: 142-151 |
| 1993 |
| 1 |  | Minsuk Lee,
Sang Lyul Min,
Chang Yun Park,
Young Hyun Bae,
Heonshik Shin,
Chong-Sang Kim:
A Dual-Mode Instruction Prefetch Scheme for Improved Worst Case and Average Case Program Execution Times.
IEEE Real-Time Systems Symposium 1993: 98-105 |